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fix: remove redundant casts from zig fmt

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This commit is contained in:
Rekai Nyangadzayi Musuka
2023-07-11 00:39:14 -05:00
parent a831ab22fe
commit 6c81608c59
13 changed files with 56 additions and 37 deletions
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6
src/arm/cpu/thumb/data_processing.zig
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@@ -14,7 +14,7 @@ pub fn fmt1(comptime InstrFn: type, comptime op: u2, comptime offset: u5) InstrF
const rs = opcode >> 3 & 0x7;
const rd = opcode & 0x7;
const result = switch (op) {
const result: u32 = switch (op) {
0b00 => blk: {
// LSL
if (offset == 0) {
@@ -36,7 +36,7 @@ pub fn fmt1(comptime InstrFn: type, comptime op: u2, comptime offset: u5) InstrF
// ASR
if (offset == 0) {
cpu.cpsr.c.write(cpu.r[rs] >> 31 & 1 == 1);
break :blk @as(u32, @bitCast(@as(i32, @bitCast(cpu.r[rs])) >> 31));
break :blk @bitCast(@as(i32, @bitCast(cpu.r[rs])) >> 31);
} else {
break :blk asr(true, &cpu.cpsr, cpu.r[rs], offset);
}
@@ -115,7 +115,7 @@ pub fn fmt2(comptime InstrFn: type, comptime I: bool, is_sub: bool, rn: u3) Inst
return struct {
fn inner(cpu: Arm32, _: Bus, opcode: u16) void {
const rs = opcode >> 3 & 0x7;
const rd = @as(u3, @truncate(opcode));
const rd: u3 = @truncate(opcode);
const op1 = cpu.r[rs];
const op2: u32 = if (I) rn else cpu.r[rn];