fix: `Arm32` should represent generic, not pointer to generic
This commit is contained in:
parent
ada2a08516
commit
591352a65b
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@ -1,8 +1,8 @@
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pub fn blockDataTransfer(comptime InstrFn: type, comptime P: bool, comptime U: bool, comptime S: bool, comptime W: bool, comptime L: bool) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u32) void {
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fn inner(cpu: *Arm32, opcode: u32) void {
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const rn: u4 = @truncate(opcode >> 16 & 0xF);
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const rlist = opcode & 0xFFFF;
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const r15 = rlist >> 15 & 1 == 1;
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@ -78,7 +78,7 @@ pub fn blockDataTransfer(comptime InstrFn: type, comptime P: bool, comptime U: b
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if (W and L and rlist >> rn & 1 == 0) cpu.r[rn] = new_base;
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}
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fn transfer(cpu: Arm32, r15_present: bool, i: u5, address: u32) void {
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fn transfer(cpu: *Arm32, r15_present: bool, i: u5, address: u32) void {
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if (L) {
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if (S and !r15_present) {
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// Always Transfer User mode Registers
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@ -1,10 +1,10 @@
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const sext = @import("zba-util").sext;
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pub fn branch(comptime InstrFn: type, comptime L: bool) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u32) void {
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fn inner(cpu: *Arm32, opcode: u32) void {
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if (L) cpu.r[14] = cpu.r[15] - 4;
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cpu.r[15] +%= sext(u32, u24, opcode) << 2;
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@ -14,10 +14,10 @@ pub fn branch(comptime InstrFn: type, comptime L: bool) InstrFn {
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}
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pub fn branchAndExchange(comptime InstrFn: type) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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pub fn inner(cpu: Arm32, opcode: u32) void {
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pub fn inner(cpu: *Arm32, opcode: u32) void {
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const rn = opcode & 0xF;
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const thumb = cpu.r[rn] & 1 == 1;
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@ -8,10 +8,10 @@ pub fn dataTransfer(comptime InstrFn: type, comptime P: bool, comptime U: bool,
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_ = N;
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_ = U;
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_ = P;
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u32) void {
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fn inner(cpu: *Arm32, opcode: u32) void {
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_ = cpu;
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log.err("TODO: handle 0x{X:0>8} which is a coprocessor data transfer instr", .{opcode});
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@ -23,10 +23,10 @@ pub fn registerTransfer(comptime InstrFn: type, comptime opcode1: u3, comptime L
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_ = opcode2;
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_ = L;
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_ = opcode1;
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u32) void {
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fn inner(cpu: *Arm32, opcode: u32) void {
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_ = cpu;
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log.err("TODO: handle 0x{X:0>8} which is a coprocessor register transfer instr", .{opcode});
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@ -37,10 +37,10 @@ pub fn registerTransfer(comptime InstrFn: type, comptime opcode1: u3, comptime L
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pub fn dataProcessing(comptime InstrFn: type, comptime opcode1: u4, comptime opcode2: u3) InstrFn {
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_ = opcode2;
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_ = opcode1;
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u32) void {
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fn inner(cpu: *Arm32, opcode: u32) void {
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_ = cpu;
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log.err("TODO: handle 0x{X:0>8} which is a coprocessor data processing instr", .{opcode});
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@ -2,10 +2,10 @@ const exec = @import("../barrel_shifter.zig").exec;
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const ror = @import("../barrel_shifter.zig").ror;
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pub fn dataProcessing(comptime InstrFn: type, comptime I: bool, comptime S: bool, comptime kind: u4) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u32) void {
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fn inner(cpu: *Arm32, opcode: u32) void {
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const rd: u4 = @truncate(opcode >> 12 & 0xF);
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const rn = opcode >> 16 & 0xF;
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const old_carry = @intFromBool(cpu.cpsr.c.read());
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@ -152,7 +152,7 @@ pub fn dataProcessing(comptime InstrFn: type, comptime I: bool, comptime S: bool
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}
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}
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fn undefinedTestBehaviour(cpu: Arm32) void {
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fn undefinedTestBehaviour(cpu: *Arm32) void {
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@setCold(true);
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cpu.setCpsr(cpu.spsr.raw);
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}
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@ -2,10 +2,10 @@ const sext = @import("zba-util").sext;
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const rotr = @import("zba-util").rotr;
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pub fn halfAndSignedDataTransfer(comptime InstrFn: type, comptime P: bool, comptime U: bool, comptime I: bool, comptime W: bool, comptime L: bool) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u32) void {
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fn inner(cpu: *Arm32, opcode: u32) void {
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const rn = opcode >> 16 & 0xF;
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const rd = opcode >> 12 & 0xF;
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const rm = opcode & 0xF;
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@ -1,8 +1,8 @@
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pub fn multiply(comptime InstrFn: type, comptime A: bool, comptime S: bool) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u32) void {
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fn inner(cpu: *Arm32, opcode: u32) void {
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const rd = opcode >> 16 & 0xF;
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const rn = opcode >> 12 & 0xF;
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const rs = opcode >> 8 & 0xF;
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@ -22,10 +22,10 @@ pub fn multiply(comptime InstrFn: type, comptime A: bool, comptime S: bool) Inst
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}
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pub fn multiplyLong(comptime InstrFn: type, comptime U: bool, comptime A: bool, comptime S: bool) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u32) void {
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fn inner(cpu: *Arm32, opcode: u32) void {
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const rd_hi = opcode >> 16 & 0xF;
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const rd_lo = opcode >> 12 & 0xF;
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const rs = opcode >> 8 & 0xF;
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@ -7,10 +7,10 @@ const log = std.log.scoped(.PsrTransfer);
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const rotr = @import("zba-util").rotr;
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pub fn psrTransfer(comptime InstrFn: type, comptime I: bool, comptime R: bool, comptime kind: u2) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u32) void {
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fn inner(cpu: *Arm32, opcode: u32) void {
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switch (kind) {
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0b00 => {
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// MRS
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@ -1,10 +1,10 @@
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const rotr = @import("zba-util").rotr;
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pub fn singleDataSwap(comptime InstrFn: type, comptime B: bool) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u32) void {
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fn inner(cpu: *Arm32, opcode: u32) void {
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const rn = opcode >> 16 & 0xF;
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const rd = opcode >> 12 & 0xF;
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const rm = opcode & 0xF;
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@ -3,10 +3,10 @@ const shifter = @import("../barrel_shifter.zig");
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const rotr = @import("zba-util").rotr;
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pub fn singleDataTransfer(comptime InstrFn: type, comptime I: bool, comptime P: bool, comptime U: bool, comptime B: bool, comptime W: bool, comptime L: bool) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u32) void {
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fn inner(cpu: *Arm32, opcode: u32) void {
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const rn = opcode >> 16 & 0xF;
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const rd = opcode >> 12 & 0xF;
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@ -1,8 +1,8 @@
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pub fn armSoftwareInterrupt(comptime InstrFn: type) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, _: u32) void {
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fn inner(cpu: *Arm32, _: u32) void {
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// Copy Values from Current Mode
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const ret_addr = cpu.r[15] - 4;
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const cpsr = cpu.cpsr.raw;
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@ -7,10 +7,10 @@ const asr = @import("../barrel_shifter.zig").asr;
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const ror = @import("../barrel_shifter.zig").ror;
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pub fn fmt4(comptime InstrFn: type, comptime op: u4) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u16) void {
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fn inner(cpu: *Arm32, opcode: u16) void {
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const rs = opcode >> 3 & 0x7;
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const rd = opcode & 0x7;
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const carry = @intFromBool(cpu.cpsr.c.read());
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@ -1,8 +1,8 @@
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pub fn fmt14(comptime InstrFn: type, comptime L: bool, comptime R: bool) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u16) void {
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fn inner(cpu: *Arm32, opcode: u16) void {
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const count = @intFromBool(R) + countRlist(opcode);
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const start = cpu.r[13] - if (!L) count * 4 else 0;
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@ -45,10 +45,10 @@ pub fn fmt14(comptime InstrFn: type, comptime L: bool, comptime R: bool) InstrFn
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}
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pub fn fmt15(comptime InstrFn: type, comptime L: bool, comptime rb: u3) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u16) void {
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fn inner(cpu: *Arm32, opcode: u16) void {
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var address = cpu.r[rb];
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const end_address = cpu.r[rb] + 4 * countRlist(opcode);
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@ -1,10 +1,10 @@
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const sext = @import("zba-util").sext;
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pub fn fmt16(comptime InstrFn: type, comptime cond: u4) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u16) void {
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fn inner(cpu: *Arm32, opcode: u16) void {
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// B
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if (cond == 0xE or cond == 0xF)
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cpu.panic("[CPU/THUMB.16] Undefined conditional branch with condition {}", .{cond});
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@ -18,11 +18,11 @@ pub fn fmt16(comptime InstrFn: type, comptime cond: u4) InstrFn {
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}
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pub fn fmt18(comptime InstrFn: type) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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// B but conditional
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fn inner(cpu: Arm32, opcode: u16) void {
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fn inner(cpu: *Arm32, opcode: u16) void {
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cpu.r[15] +%= sext(u32, u11, opcode & 0x7FF) << 1;
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cpu.pipe.reload(cpu);
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}
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@ -30,10 +30,10 @@ pub fn fmt18(comptime InstrFn: type) InstrFn {
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}
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pub fn fmt19(comptime InstrFn: type, comptime is_low: bool) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u16) void {
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fn inner(cpu: *Arm32, opcode: u16) void {
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// BL
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const offset = opcode & 0x7FF;
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@ -5,10 +5,10 @@ const lsr = @import("../barrel_shifter.zig").lsr;
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const asr = @import("../barrel_shifter.zig").asr;
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pub fn fmt1(comptime InstrFn: type, comptime op: u2, comptime offset: u5) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u16) void {
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fn inner(cpu: *Arm32, opcode: u16) void {
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const rs = opcode >> 3 & 0x7;
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const rd = opcode & 0x7;
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@ -53,10 +53,10 @@ pub fn fmt1(comptime InstrFn: type, comptime op: u2, comptime offset: u5) InstrF
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}
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pub fn fmt5(comptime InstrFn: type, comptime op: u2, comptime h1: u1, comptime h2: u1) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u16) void {
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fn inner(cpu: *Arm32, opcode: u16) void {
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const rs = @as(u4, h2) << 3 | (opcode >> 3 & 0x7);
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const rd = @as(u4, h1) << 3 | (opcode & 0x7);
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@ -108,10 +108,10 @@ pub fn fmt5(comptime InstrFn: type, comptime op: u2, comptime h1: u1, comptime h
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}
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pub fn fmt2(comptime InstrFn: type, comptime I: bool, is_sub: bool, rn: u3) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u16) void {
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fn inner(cpu: *Arm32, opcode: u16) void {
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const rs = opcode >> 3 & 0x7;
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const rd: u3 = @truncate(opcode);
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const op1 = cpu.r[rs];
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}
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pub fn fmt3(comptime InstrFn: type, comptime op: u2, comptime rd: u3) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u16) void {
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fn inner(cpu: *Arm32, opcode: u16) void {
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const op1 = cpu.r[rd];
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const op2: u32 = opcode & 0xFF; // Offset
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@ -182,10 +182,10 @@ pub fn fmt3(comptime InstrFn: type, comptime op: u2, comptime rd: u3) InstrFn {
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}
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pub fn fmt12(comptime InstrFn: type, comptime isSP: bool, comptime rd: u3) InstrFn {
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const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
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const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
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return struct {
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fn inner(cpu: Arm32, opcode: u16) void {
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fn inner(cpu: *Arm32, opcode: u16) void {
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// ADD
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const left = if (isSP) cpu.r[13] else cpu.r[15] & ~@as(u32, 2);
|
||||
const right = (opcode & 0xFF) << 2;
|
||||
|
@ -195,10 +195,10 @@ pub fn fmt12(comptime InstrFn: type, comptime isSP: bool, comptime rd: u3) Instr
|
|||
}
|
||||
|
||||
pub fn fmt13(comptime InstrFn: type, comptime S: bool) InstrFn {
|
||||
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
|
||||
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
|
||||
|
||||
return struct {
|
||||
fn inner(cpu: Arm32, opcode: u16) void {
|
||||
fn inner(cpu: *Arm32, opcode: u16) void {
|
||||
// ADD
|
||||
const offset = (opcode & 0x7F) << 2;
|
||||
cpu.r[13] = if (S) cpu.r[13] - offset else cpu.r[13] + offset;
|
||||
|
|
|
@ -2,10 +2,10 @@ const rotr = @import("zba-util").rotr;
|
|||
const sext = @import("zba-util").sext;
|
||||
|
||||
pub fn fmt6(comptime InstrFn: type, comptime rd: u3) InstrFn {
|
||||
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
|
||||
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
|
||||
|
||||
return struct {
|
||||
fn inner(cpu: Arm32, opcode: u16) void {
|
||||
fn inner(cpu: *Arm32, opcode: u16) void {
|
||||
// LDR
|
||||
const offset = (opcode & 0xFF) << 2;
|
||||
|
||||
|
@ -16,10 +16,10 @@ pub fn fmt6(comptime InstrFn: type, comptime rd: u3) InstrFn {
|
|||
}
|
||||
|
||||
pub fn fmt78(comptime InstrFn: type, comptime op: u2, comptime T: bool) InstrFn {
|
||||
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
|
||||
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
|
||||
|
||||
return struct {
|
||||
fn inner(cpu: Arm32, opcode: u16) void {
|
||||
fn inner(cpu: *Arm32, opcode: u16) void {
|
||||
const ro = opcode >> 6 & 0x7;
|
||||
const rb = opcode >> 3 & 0x7;
|
||||
const rd = opcode & 0x7;
|
||||
|
@ -81,10 +81,10 @@ pub fn fmt78(comptime InstrFn: type, comptime op: u2, comptime T: bool) InstrFn
|
|||
}
|
||||
|
||||
pub fn fmt9(comptime InstrFn: type, comptime B: bool, comptime L: bool, comptime offset: u5) InstrFn {
|
||||
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
|
||||
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
|
||||
|
||||
return struct {
|
||||
fn inner(cpu: Arm32, opcode: u16) void {
|
||||
fn inner(cpu: *Arm32, opcode: u16) void {
|
||||
const rb = opcode >> 3 & 0x7;
|
||||
const rd = opcode & 0x7;
|
||||
|
||||
|
@ -117,10 +117,10 @@ pub fn fmt9(comptime InstrFn: type, comptime B: bool, comptime L: bool, comptime
|
|||
}
|
||||
|
||||
pub fn fmt10(comptime InstrFn: type, comptime L: bool, comptime offset: u5) InstrFn {
|
||||
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
|
||||
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
|
||||
|
||||
return struct {
|
||||
fn inner(cpu: Arm32, opcode: u16) void {
|
||||
fn inner(cpu: *Arm32, opcode: u16) void {
|
||||
const rb = opcode >> 3 & 0x7;
|
||||
const rd = opcode & 0x7;
|
||||
|
||||
|
@ -141,10 +141,10 @@ pub fn fmt10(comptime InstrFn: type, comptime L: bool, comptime offset: u5) Inst
|
|||
}
|
||||
|
||||
pub fn fmt11(comptime InstrFn: type, comptime L: bool, comptime rd: u3) InstrFn {
|
||||
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
|
||||
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
|
||||
|
||||
return struct {
|
||||
fn inner(cpu: Arm32, opcode: u16) void {
|
||||
fn inner(cpu: *Arm32, opcode: u16) void {
|
||||
const offset = (opcode & 0xFF) << 2;
|
||||
const address = cpu.r[13] + offset;
|
||||
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
pub fn fmt17(comptime InstrFn: type) InstrFn {
|
||||
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
|
||||
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
|
||||
|
||||
return struct {
|
||||
fn inner(cpu: Arm32, _: u16) void {
|
||||
fn inner(cpu: *Arm32, _: u16) void {
|
||||
// Copy Values from Current Mode
|
||||
const ret_addr = cpu.r[15] - 2;
|
||||
const cpsr = cpu.cpsr.raw;
|
||||
|
|
Loading…
Reference in New Issue