fix: Arm32 should represent generic, not pointer to generic

src/arm/cpu/arm/block_data_transfer.zig

@@ -1,8 +1,8 @@
 pub fn blockDataTransfer(comptime InstrFn: type, comptime P: bool, comptime U: bool, comptime S: bool, comptime W: bool, comptime L: bool) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u32) void {
+        fn inner(cpu: *Arm32, opcode: u32) void {
             const rn: u4 = @truncate(opcode >> 16 & 0xF);
             const rlist = opcode & 0xFFFF;
             const r15 = rlist >> 15 & 1 == 1;
@@ -78,7 +78,7 @@ pub fn blockDataTransfer(comptime InstrFn: type, comptime P: bool, comptime U: b
             if (W and L and rlist >> rn & 1 == 0) cpu.r[rn] = new_base;
         }
 
-        fn transfer(cpu: Arm32, r15_present: bool, i: u5, address: u32) void {
+        fn transfer(cpu: *Arm32, r15_present: bool, i: u5, address: u32) void {
             if (L) {
                 if (S and !r15_present) {
                     // Always Transfer User mode Registers

src/arm/cpu/arm/branch.zig

@@ -1,10 +1,10 @@
 const sext = @import("zba-util").sext;
 
 pub fn branch(comptime InstrFn: type, comptime L: bool) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u32) void {
+        fn inner(cpu: *Arm32, opcode: u32) void {
             if (L) cpu.r[14] = cpu.r[15] - 4;
 
             cpu.r[15] +%= sext(u32, u24, opcode) << 2;
@@ -14,10 +14,10 @@ pub fn branch(comptime InstrFn: type, comptime L: bool) InstrFn {
 }
 
 pub fn branchAndExchange(comptime InstrFn: type) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        pub fn inner(cpu: Arm32, opcode: u32) void {
+        pub fn inner(cpu: *Arm32, opcode: u32) void {
             const rn = opcode & 0xF;
 
             const thumb = cpu.r[rn] & 1 == 1;

src/arm/cpu/arm/coprocessor.zig

@@ -8,10 +8,10 @@ pub fn dataTransfer(comptime InstrFn: type, comptime P: bool, comptime U: bool,
     _ = N;
     _ = U;
     _ = P;
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u32) void {
+        fn inner(cpu: *Arm32, opcode: u32) void {
             _ = cpu;
 
             log.err("TODO: handle 0x{X:0>8} which is a coprocessor data transfer instr", .{opcode});
@@ -23,10 +23,10 @@ pub fn registerTransfer(comptime InstrFn: type, comptime opcode1: u3, comptime L
     _ = opcode2;
     _ = L;
     _ = opcode1;
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u32) void {
+        fn inner(cpu: *Arm32, opcode: u32) void {
             _ = cpu;
 
             log.err("TODO: handle 0x{X:0>8} which is a coprocessor register transfer instr", .{opcode});
@@ -37,10 +37,10 @@ pub fn registerTransfer(comptime InstrFn: type, comptime opcode1: u3, comptime L
 pub fn dataProcessing(comptime InstrFn: type, comptime opcode1: u4, comptime opcode2: u3) InstrFn {
     _ = opcode2;
     _ = opcode1;
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u32) void {
+        fn inner(cpu: *Arm32, opcode: u32) void {
             _ = cpu;
 
             log.err("TODO: handle 0x{X:0>8} which is a coprocessor data processing instr", .{opcode});

src/arm/cpu/arm/data_processing.zig

@@ -2,10 +2,10 @@ const exec = @import("../barrel_shifter.zig").exec;
 const ror = @import("../barrel_shifter.zig").ror;
 
 pub fn dataProcessing(comptime InstrFn: type, comptime I: bool, comptime S: bool, comptime kind: u4) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u32) void {
+        fn inner(cpu: *Arm32, opcode: u32) void {
             const rd: u4 = @truncate(opcode >> 12 & 0xF);
             const rn = opcode >> 16 & 0xF;
             const old_carry = @intFromBool(cpu.cpsr.c.read());
@@ -152,7 +152,7 @@ pub fn dataProcessing(comptime InstrFn: type, comptime I: bool, comptime S: bool
             }
         }
 
-        fn undefinedTestBehaviour(cpu: Arm32) void {
+        fn undefinedTestBehaviour(cpu: *Arm32) void {
             @setCold(true);
             cpu.setCpsr(cpu.spsr.raw);
         }

src/arm/cpu/arm/half_signed_data_transfer.zig

@@ -2,10 +2,10 @@ const sext = @import("zba-util").sext;
 const rotr = @import("zba-util").rotr;
 
 pub fn halfAndSignedDataTransfer(comptime InstrFn: type, comptime P: bool, comptime U: bool, comptime I: bool, comptime W: bool, comptime L: bool) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u32) void {
+        fn inner(cpu: *Arm32, opcode: u32) void {
             const rn = opcode >> 16 & 0xF;
             const rd = opcode >> 12 & 0xF;
             const rm = opcode & 0xF;

src/arm/cpu/arm/multiply.zig

@@ -1,8 +1,8 @@
 pub fn multiply(comptime InstrFn: type, comptime A: bool, comptime S: bool) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u32) void {
+        fn inner(cpu: *Arm32, opcode: u32) void {
             const rd = opcode >> 16 & 0xF;
             const rn = opcode >> 12 & 0xF;
             const rs = opcode >> 8 & 0xF;
@@ -22,10 +22,10 @@ pub fn multiply(comptime InstrFn: type, comptime A: bool, comptime S: bool) Inst
 }
 
 pub fn multiplyLong(comptime InstrFn: type, comptime U: bool, comptime A: bool, comptime S: bool) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u32) void {
+        fn inner(cpu: *Arm32, opcode: u32) void {
             const rd_hi = opcode >> 16 & 0xF;
             const rd_lo = opcode >> 12 & 0xF;
             const rs = opcode >> 8 & 0xF;

src/arm/cpu/arm/psr_transfer.zig

@@ -7,10 +7,10 @@ const log = std.log.scoped(.PsrTransfer);
 const rotr = @import("zba-util").rotr;
 
 pub fn psrTransfer(comptime InstrFn: type, comptime I: bool, comptime R: bool, comptime kind: u2) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u32) void {
+        fn inner(cpu: *Arm32, opcode: u32) void {
             switch (kind) {
                 0b00 => {
                     // MRS

src/arm/cpu/arm/single_data_swap.zig

@@ -1,10 +1,10 @@
 const rotr = @import("zba-util").rotr;
 
 pub fn singleDataSwap(comptime InstrFn: type, comptime B: bool) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u32) void {
+        fn inner(cpu: *Arm32, opcode: u32) void {
             const rn = opcode >> 16 & 0xF;
             const rd = opcode >> 12 & 0xF;
             const rm = opcode & 0xF;

src/arm/cpu/arm/single_data_transfer.zig

@@ -3,10 +3,10 @@ const shifter = @import("../barrel_shifter.zig");
 const rotr = @import("zba-util").rotr;
 
 pub fn singleDataTransfer(comptime InstrFn: type, comptime I: bool, comptime P: bool, comptime U: bool, comptime B: bool, comptime W: bool, comptime L: bool) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u32) void {
+        fn inner(cpu: *Arm32, opcode: u32) void {
             const rn = opcode >> 16 & 0xF;
             const rd = opcode >> 12 & 0xF;
 

src/arm/cpu/arm/software_interrupt.zig

@@ -1,8 +1,8 @@
 pub fn armSoftwareInterrupt(comptime InstrFn: type) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, _: u32) void {
+        fn inner(cpu: *Arm32, _: u32) void {
             // Copy Values from Current Mode
             const ret_addr = cpu.r[15] - 4;
             const cpsr = cpu.cpsr.raw;

src/arm/cpu/thumb/alu.zig

@@ -7,10 +7,10 @@ const asr = @import("../barrel_shifter.zig").asr;
 const ror = @import("../barrel_shifter.zig").ror;
 
 pub fn fmt4(comptime InstrFn: type, comptime op: u4) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             const rs = opcode >> 3 & 0x7;
             const rd = opcode & 0x7;
             const carry = @intFromBool(cpu.cpsr.c.read());

src/arm/cpu/thumb/block_data_transfer.zig

@@ -1,8 +1,8 @@
 pub fn fmt14(comptime InstrFn: type, comptime L: bool, comptime R: bool) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             const count = @intFromBool(R) + countRlist(opcode);
             const start = cpu.r[13] - if (!L) count * 4 else 0;
 
@@ -45,10 +45,10 @@ pub fn fmt14(comptime InstrFn: type, comptime L: bool, comptime R: bool) InstrFn
 }
 
 pub fn fmt15(comptime InstrFn: type, comptime L: bool, comptime rb: u3) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             var address = cpu.r[rb];
             const end_address = cpu.r[rb] + 4 * countRlist(opcode);
 

src/arm/cpu/thumb/branch.zig

@@ -1,10 +1,10 @@
 const sext = @import("zba-util").sext;
 
 pub fn fmt16(comptime InstrFn: type, comptime cond: u4) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             // B
             if (cond == 0xE or cond == 0xF)
                 cpu.panic("[CPU/THUMB.16] Undefined conditional branch with condition {}", .{cond});
@@ -18,11 +18,11 @@ pub fn fmt16(comptime InstrFn: type, comptime cond: u4) InstrFn {
 }
 
 pub fn fmt18(comptime InstrFn: type) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
         // B but conditional
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             cpu.r[15] +%= sext(u32, u11, opcode & 0x7FF) << 1;
             cpu.pipe.reload(cpu);
         }
@@ -30,10 +30,10 @@ pub fn fmt18(comptime InstrFn: type) InstrFn {
 }
 
 pub fn fmt19(comptime InstrFn: type, comptime is_low: bool) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             // BL
             const offset = opcode & 0x7FF;
 

src/arm/cpu/thumb/data_processing.zig

@@ -5,10 +5,10 @@ const lsr = @import("../barrel_shifter.zig").lsr;
 const asr = @import("../barrel_shifter.zig").asr;
 
 pub fn fmt1(comptime InstrFn: type, comptime op: u2, comptime offset: u5) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             const rs = opcode >> 3 & 0x7;
             const rd = opcode & 0x7;
 
@@ -53,10 +53,10 @@ pub fn fmt1(comptime InstrFn: type, comptime op: u2, comptime offset: u5) InstrF
 }
 
 pub fn fmt5(comptime InstrFn: type, comptime op: u2, comptime h1: u1, comptime h2: u1) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             const rs = @as(u4, h2) << 3 | (opcode >> 3 & 0x7);
             const rd = @as(u4, h1) << 3 | (opcode & 0x7);
 
@@ -108,10 +108,10 @@ pub fn fmt5(comptime InstrFn: type, comptime op: u2, comptime h1: u1, comptime h
 }
 
 pub fn fmt2(comptime InstrFn: type, comptime I: bool, is_sub: bool, rn: u3) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             const rs = opcode >> 3 & 0x7;
             const rd: u3 = @truncate(opcode);
             const op1 = cpu.r[rs];
@@ -142,10 +142,10 @@ pub fn fmt2(comptime InstrFn: type, comptime I: bool, is_sub: bool, rn: u3) Inst
 }
 
 pub fn fmt3(comptime InstrFn: type, comptime op: u2, comptime rd: u3) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             const op1 = cpu.r[rd];
             const op2: u32 = opcode & 0xFF; // Offset
 
@@ -182,10 +182,10 @@ pub fn fmt3(comptime InstrFn: type, comptime op: u2, comptime rd: u3) InstrFn {
 }
 
 pub fn fmt12(comptime InstrFn: type, comptime isSP: bool, comptime rd: u3) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             // ADD
             const left = if (isSP) cpu.r[13] else cpu.r[15] & ~@as(u32, 2);
             const right = (opcode & 0xFF) << 2;
@@ -195,10 +195,10 @@ pub fn fmt12(comptime InstrFn: type, comptime isSP: bool, comptime rd: u3) Instr
 }
 
 pub fn fmt13(comptime InstrFn: type, comptime S: bool) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             // ADD
             const offset = (opcode & 0x7F) << 2;
             cpu.r[13] = if (S) cpu.r[13] - offset else cpu.r[13] + offset;

src/arm/cpu/thumb/data_transfer.zig

@@ -2,10 +2,10 @@ const rotr = @import("zba-util").rotr;
 const sext = @import("zba-util").sext;
 
 pub fn fmt6(comptime InstrFn: type, comptime rd: u3) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             // LDR
             const offset = (opcode & 0xFF) << 2;
 
@@ -16,10 +16,10 @@ pub fn fmt6(comptime InstrFn: type, comptime rd: u3) InstrFn {
 }
 
 pub fn fmt78(comptime InstrFn: type, comptime op: u2, comptime T: bool) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             const ro = opcode >> 6 & 0x7;
             const rb = opcode >> 3 & 0x7;
             const rd = opcode & 0x7;
@@ -81,10 +81,10 @@ pub fn fmt78(comptime InstrFn: type, comptime op: u2, comptime T: bool) InstrFn
 }
 
 pub fn fmt9(comptime InstrFn: type, comptime B: bool, comptime L: bool, comptime offset: u5) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             const rb = opcode >> 3 & 0x7;
             const rd = opcode & 0x7;
 
@@ -117,10 +117,10 @@ pub fn fmt9(comptime InstrFn: type, comptime B: bool, comptime L: bool, comptime
 }
 
 pub fn fmt10(comptime InstrFn: type, comptime L: bool, comptime offset: u5) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             const rb = opcode >> 3 & 0x7;
             const rd = opcode & 0x7;
 
@@ -141,10 +141,10 @@ pub fn fmt10(comptime InstrFn: type, comptime L: bool, comptime offset: u5) Inst
 }
 
 pub fn fmt11(comptime InstrFn: type, comptime L: bool, comptime rd: u3) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, opcode: u16) void {
+        fn inner(cpu: *Arm32, opcode: u16) void {
             const offset = (opcode & 0xFF) << 2;
             const address = cpu.r[13] + offset;
 

src/arm/cpu/thumb/software_interrupt.zig

@@ -1,8 +1,8 @@
 pub fn fmt17(comptime InstrFn: type) InstrFn {
-    const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
+    const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
 
     return struct {
-        fn inner(cpu: Arm32, _: u16) void {
+        fn inner(cpu: *Arm32, _: u16) void {
             // Copy Values from Current Mode
             const ret_addr = cpu.r[15] - 2;
             const cpsr = cpu.cpsr.raw;