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fix: Arm32 should represent generic, not pointer to generic

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This commit is contained in:
Rekai Nyangadzayi Musuka
2023-09-05 21:05:28 -05:00
parent ada2a08516
commit 591352a65b
16 changed files with 66 additions and 66 deletions
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4
src/arm/cpu/thumb/alu.zig
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@@ -7,10 +7,10 @@ const asr = @import("../barrel_shifter.zig").asr;
const ror = @import("../barrel_shifter.zig").ror;
pub fn fmt4(comptime InstrFn: type, comptime op: u4) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
const rs = opcode >> 3 & 0x7;
const rd = opcode & 0x7;
const carry = @intFromBool(cpu.cpsr.c.read());

8
src/arm/cpu/thumb/block_data_transfer.zig
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@@ -1,8 +1,8 @@
pub fn fmt14(comptime InstrFn: type, comptime L: bool, comptime R: bool) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
const count = @intFromBool(R) + countRlist(opcode);
const start = cpu.r[13] - if (!L) count * 4 else 0;
@@ -45,10 +45,10 @@ pub fn fmt14(comptime InstrFn: type, comptime L: bool, comptime R: bool) InstrFn
}
pub fn fmt15(comptime InstrFn: type, comptime L: bool, comptime rb: u3) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
var address = cpu.r[rb];
const end_address = cpu.r[rb] + 4 * countRlist(opcode);

12
src/arm/cpu/thumb/branch.zig
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@@ -1,10 +1,10 @@
const sext = @import("zba-util").sext;
pub fn fmt16(comptime InstrFn: type, comptime cond: u4) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
// B
if (cond == 0xE or cond == 0xF)
cpu.panic("[CPU/THUMB.16] Undefined conditional branch with condition {}", .{cond});
@@ -18,11 +18,11 @@ pub fn fmt16(comptime InstrFn: type, comptime cond: u4) InstrFn {
}
pub fn fmt18(comptime InstrFn: type) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
// B but conditional
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
cpu.r[15] +%= sext(u32, u11, opcode & 0x7FF) << 1;
cpu.pipe.reload(cpu);
}
@@ -30,10 +30,10 @@ pub fn fmt18(comptime InstrFn: type) InstrFn {
}
pub fn fmt19(comptime InstrFn: type, comptime is_low: bool) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
// BL
const offset = opcode & 0x7FF;

24
src/arm/cpu/thumb/data_processing.zig
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@@ -5,10 +5,10 @@ const lsr = @import("../barrel_shifter.zig").lsr;
const asr = @import("../barrel_shifter.zig").asr;
pub fn fmt1(comptime InstrFn: type, comptime op: u2, comptime offset: u5) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
const rs = opcode >> 3 & 0x7;
const rd = opcode & 0x7;
@@ -53,10 +53,10 @@ pub fn fmt1(comptime InstrFn: type, comptime op: u2, comptime offset: u5) InstrF
}
pub fn fmt5(comptime InstrFn: type, comptime op: u2, comptime h1: u1, comptime h2: u1) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
const rs = @as(u4, h2) << 3 | (opcode >> 3 & 0x7);
const rd = @as(u4, h1) << 3 | (opcode & 0x7);
@@ -108,10 +108,10 @@ pub fn fmt5(comptime InstrFn: type, comptime op: u2, comptime h1: u1, comptime h
}
pub fn fmt2(comptime InstrFn: type, comptime I: bool, is_sub: bool, rn: u3) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
const rs = opcode >> 3 & 0x7;
const rd: u3 = @truncate(opcode);
const op1 = cpu.r[rs];
@@ -142,10 +142,10 @@ pub fn fmt2(comptime InstrFn: type, comptime I: bool, is_sub: bool, rn: u3) Inst
}
pub fn fmt3(comptime InstrFn: type, comptime op: u2, comptime rd: u3) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
const op1 = cpu.r[rd];
const op2: u32 = opcode & 0xFF; // Offset
@@ -182,10 +182,10 @@ pub fn fmt3(comptime InstrFn: type, comptime op: u2, comptime rd: u3) InstrFn {
}
pub fn fmt12(comptime InstrFn: type, comptime isSP: bool, comptime rd: u3) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
// ADD
const left = if (isSP) cpu.r[13] else cpu.r[15] & ~@as(u32, 2);
const right = (opcode & 0xFF) << 2;
@@ -195,10 +195,10 @@ pub fn fmt12(comptime InstrFn: type, comptime isSP: bool, comptime rd: u3) Instr
}
pub fn fmt13(comptime InstrFn: type, comptime S: bool) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
// ADD
const offset = (opcode & 0x7F) << 2;
cpu.r[13] = if (S) cpu.r[13] - offset else cpu.r[13] + offset;

20
src/arm/cpu/thumb/data_transfer.zig
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@@ -2,10 +2,10 @@ const rotr = @import("zba-util").rotr;
const sext = @import("zba-util").sext;
pub fn fmt6(comptime InstrFn: type, comptime rd: u3) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
// LDR
const offset = (opcode & 0xFF) << 2;
@@ -16,10 +16,10 @@ pub fn fmt6(comptime InstrFn: type, comptime rd: u3) InstrFn {
}
pub fn fmt78(comptime InstrFn: type, comptime op: u2, comptime T: bool) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
const ro = opcode >> 6 & 0x7;
const rb = opcode >> 3 & 0x7;
const rd = opcode & 0x7;
@@ -81,10 +81,10 @@ pub fn fmt78(comptime InstrFn: type, comptime op: u2, comptime T: bool) InstrFn
}
pub fn fmt9(comptime InstrFn: type, comptime B: bool, comptime L: bool, comptime offset: u5) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
const rb = opcode >> 3 & 0x7;
const rd = opcode & 0x7;
@@ -117,10 +117,10 @@ pub fn fmt9(comptime InstrFn: type, comptime B: bool, comptime L: bool, comptime
}
pub fn fmt10(comptime InstrFn: type, comptime L: bool, comptime offset: u5) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
const rb = opcode >> 3 & 0x7;
const rd = opcode & 0x7;
@@ -141,10 +141,10 @@ pub fn fmt10(comptime InstrFn: type, comptime L: bool, comptime offset: u5) Inst
}
pub fn fmt11(comptime InstrFn: type, comptime L: bool, comptime rd: u3) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, opcode: u16) void {
fn inner(cpu: *Arm32, opcode: u16) void {
const offset = (opcode & 0xFF) << 2;
const address = cpu.r[13] + offset;

4
src/arm/cpu/thumb/software_interrupt.zig
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@@ -1,8 +1,8 @@
pub fn fmt17(comptime InstrFn: type) InstrFn {
const Arm32 = @typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?;
const Arm32 = @typeInfo(@typeInfo(@typeInfo(InstrFn).Pointer.child).Fn.params[0].type.?).Pointer.child;
return struct {
fn inner(cpu: Arm32, _: u16) void {
fn inner(cpu: *Arm32, _: u16) void {
// Copy Values from Current Mode
const ret_addr = cpu.r[15] - 2;
const cpsr = cpu.cpsr.raw;