feat(v5te): implement THUMB BLX(1), BLX(2), and ARM BLX

src/arm/cpu/thumb/data_processing.zig

@@ -60,6 +60,17 @@ pub fn fmt5(comptime InstrFn: type, comptime op: u2, comptime h1: u1, comptime h
             const rs = @as(u4, h2) << 3 | (opcode >> 3 & 0x7);
             const rd = @as(u4, h1) << 3 | (opcode & 0x7);
 
+            if (Arm32.arch == .v5te and op == 0b11 and h1 == 0b1) {
+                // BLX
+                const rm = rs;
+
+                cpu.r[14] = (cpu.r[15] - 2) | 1;
+                cpu.cpsr.t.write(cpu.r[rm] & 1 == 1);
+
+                cpu.r[15] = cpu.r[rm] & ~@as(u32, 1);
+                cpu.pipe.reload(cpu);
+            }
+
             const op1 = cpu.r[rd];
             const op2 = cpu.r[rs];