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fix(v5te): rework MSR/MRS handling to account for v5TE extension space

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This commit is contained in:
Rekai Nyangadzayi Musuka
2023-09-07 01:23:58 -05:00
parent 6dde25bd0f
commit 177f9b55a9
3 changed files with 52 additions and 39 deletions
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21
src/arm/v5te.zig
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@@ -5,7 +5,6 @@ pub const arm = struct {
pub const lut: [0x1000]InstrFn = populate();
const processing = @import("cpu/arm/data_processing.zig").dataProcessing;
const psrTransfer = @import("cpu/arm/psr_transfer.zig").psrTransfer;
const transfer = @import("cpu/arm/single_data_transfer.zig").singleDataTransfer;
const halfSignedTransfer = @import("cpu/arm/half_signed_data_transfer.zig").halfAndSignedDataTransfer;
const blockTransfer = @import("cpu/arm/block_data_transfer.zig").blockDataTransfer;
@@ -14,6 +13,9 @@ pub const arm = struct {
const swi = @import("cpu/arm/software_interrupt.zig").armSoftwareInterrupt;
const swap = @import("cpu/arm/single_data_swap.zig").singleDataSwap;
// Control Instruction Extension Space
const control = @import("cpu/arm/psr_transfer.zig").control;
// Arithmetic Instruction Extension Space
const multiply = @import("cpu/arm/multiply.zig").multiply;
@@ -39,31 +41,30 @@ pub const arm = struct {
for (&table, 0..) |*handler, i| {
handler.* = switch (@as(u2, i >> 10)) {
0b00 => if (i == 0x121) blk: {
0b00 => if (i == 0x121) blk: { // 12 bits
break :blk branchExchange(InstrFn);
} else if (i == 0x161) blk: {
} else if (i == 0x161) blk: { // 12 bits
break :blk clz(InstrFn);
} else if (i & 0xFBF == 0x109) blk: {
} else if (i & 0xFBF == 0x109) blk: { // 11 bits
const B = i >> 6 & 1 == 1;
break :blk swap(InstrFn, B);
} else if (i & 0xF0F == 0x009) blk: {
} else if (i & 0xF0F == 0x009) blk: { // 8 bits
const L = i >> 7 & 1 == 1;
const U = i >> 6 & 1 == 1;
const A = i >> 5 & 1 == 1;
const S = i >> 4 & 1 == 1;
break :blk multiply(InstrFn, L, U, A, S);
} else if (i & 0xE49 == 0x009 or i & 0xE49 == 0x049) blk: {
} else if (i & 0xE49 == 0x009 or i & 0xE49 == 0x049) blk: { // 6 bits
const P = i >> 8 & 1 == 1;
const U = i >> 7 & 1 == 1;
const I = i >> 6 & 1 == 1;
const W = i >> 5 & 1 == 1;
const L = i >> 4 & 1 == 1;
break :blk halfSignedTransfer(InstrFn, P, U, I, W, L);
} else if (i & 0xD90 == 0x100) blk: {
} else if (i & 0xD90 == 0x100) blk: { // 6 bits
const I = i >> 9 & 1 == 1;
const R = i >> 6 & 1 == 1;
const kind = i >> 4 & 0x3;
break :blk psrTransfer(InstrFn, I, R, kind);
const op = ((i >> 5) & 0x3) << 4 | (i & 0xF);
break :blk control(InstrFn, I, op);
} else blk: {
const I = i >> 9 & 1 == 1;
const S = i >> 4 & 1 == 1;