From ed3bdd90fb3bff176b77d6f6e3e4826d5296aa4c Mon Sep 17 00:00:00 2001
From: Rekai Musuka <rekai@musuka.dev>
Date: Mon, 10 Jan 2022 08:09:02 -0400
Subject: [PATCH] feat(cpu): implement TEQ

---
 src/cpu/data_processing.zig | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/cpu/data_processing.zig b/src/cpu/data_processing.zig
index 0624daf..ac1218d 100644
--- a/src/cpu/data_processing.zig
+++ b/src/cpu/data_processing.zig
@@ -45,6 +45,15 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
                     // Barrel Shifter should always calc CPSR C in TST
                     if (!S) _ = BarrelShifter.exec(true, cpu, opcode);
                 },
+                0x9 => {
+                    // TEQ
+                    const result = cpu.r[op1] ^ op2;
+
+                    cpu.cpsr.n.write(result >> 31 & 1 == 1);
+                    cpu.cpsr.z.write(result == 0);
+                    // Barrel Shifter should always calc CPSR C in TEQ
+                    if (!S) _ = BarrelShifter.exec(true, cpu, opcode);
+                },
                 0xD => {
                     // MOV
                     cpu.r[rd] = op2;