diff --git a/src/bus/io.zig b/src/bus/io.zig
index 8e38187..8950aea 100644
--- a/src/bus/io.zig
+++ b/src/bus/io.zig
@@ -30,7 +30,7 @@ pub const Io = struct {
     pub fn write16(self: *@This(), addr: u32, halfword: u16) void {
         switch (addr) {
             0x0400_000 => self.dispcnt.val = halfword,
-            else => std.debug.panic("[I/O:16] tried to write {X:} to {X:}", .{ halfword, addr }),
+            else => std.debug.panic("[I/O:16] tried to write 0x{X:} to 0x{X:}", .{ halfword, addr }),
         }
     }
 
diff --git a/src/cpu.zig b/src/cpu.zig
index 18b995c..b2c6cfe 100644
--- a/src/cpu.zig
+++ b/src/cpu.zig
@@ -29,6 +29,19 @@ pub const Arm7tdmi = struct {
         };
     }
 
+    pub fn skipBios(self: *@This()) void {
+        self.r[0] = 0x08000000;
+        self.r[1] = 0x000000EA;
+        // GPRs 2 -> 12 *should* already be 0 initialized
+        self.r[13] = 0x0300_7F00;
+        self.r[14] = 0x0000_0000;
+        self.r[15] = 0x0800_0000;
+
+        // TODO: Set sp_irq = 0x0300_7FA0, sp_svc = 0x0300_7FE0
+
+        self.cpsr.val = 0x6000001F;
+    }
+
     pub inline fn step(self: *@This()) u64 {
         std.debug.print("PC: 0x{X:} ", .{self.r[15]});
         const opcode = self.fetch();
diff --git a/src/main.zig b/src/main.zig
index a75db88..a21849e 100644
--- a/src/main.zig
+++ b/src/main.zig
@@ -27,6 +27,8 @@ pub fn main() anyerror!void {
     var scheduler = Scheduler.init(alloc);
     var cpu = Arm7tdmi.init(&scheduler, &bus);
 
+    cpu.skipBios();
+
     while (true) {
         emu.runFrame(&scheduler, &cpu, &bus);
     }