diff --git a/src/core/cpu/arm/single_data_transfer.zig b/src/core/cpu/arm/single_data_transfer.zig
index 6d56bb4..328699e 100644
--- a/src/core/cpu/arm/single_data_transfer.zig
+++ b/src/core/cpu/arm/single_data_transfer.zig
@@ -11,9 +11,7 @@ pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool,
             const rn = opcode >> 16 & 0xF;
             const rd = opcode >> 12 & 0xF;
 
-            // rn is r15 and L is not set, the PC is 12 ahead
-            const base = cpu.r[rn] + if (!L and rn == 0xF) 4 else @as(u32, 0);
-
+            const base = cpu.r[rn];
             const offset = if (I) shifter.immediate(false, cpu, opcode) else opcode & 0xFFF;
 
             const modified_base = if (U) base +% offset else base -% offset;