From 9a5959e46cd1c0740bd2f10fb8a195e28f369fae Mon Sep 17 00:00:00 2001 From: Rekai Musuka Date: Fri, 21 Oct 2022 05:11:54 -0300 Subject: [PATCH] fix(cpu): write results of ORR to destination register --- src/cpu/data_processing.zig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/cpu/data_processing.zig b/src/cpu/data_processing.zig index ac1218d..12a045d 100644 --- a/src/cpu/data_processing.zig +++ b/src/cpu/data_processing.zig @@ -76,6 +76,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4 0xC => { // ORR const result = cpu.r[op1] | op2; + cpu.r[rd] = result; if (S and rd != 0xF) { cpu.cpsr.n.write(result >> 31 & 1 == 1);