From 99492a67828b9425d6a4656e1da138f949d42e21 Mon Sep 17 00:00:00 2001
From: Rekai Musuka <rekai@musuka.dev>
Date: Wed, 2 Feb 2022 21:14:46 -0400
Subject: [PATCH] chore: progress towards passing ldr/str thumb in armwrestler

---
 src/cpu.zig                |  7 +++--
 src/cpu/thumb/format10.zig |  3 +-
 src/cpu/thumb/format78.zig | 60 ++++++++++++++++++++++++++++++++++++++
 src/cpu/thumb/format9.zig  |  3 +-
 4 files changed, 69 insertions(+), 4 deletions(-)
 create mode 100644 src/cpu/thumb/format78.zig

diff --git a/src/cpu.zig b/src/cpu.zig
index d269aaf..c8de217 100644
--- a/src/cpu.zig
+++ b/src/cpu.zig
@@ -28,6 +28,7 @@ const format3 = @import("cpu/thumb/format3.zig").format3;
 const format4 = @import("cpu/thumb/format4.zig").format4;
 const format5 = @import("cpu/thumb/format5.zig").format5;
 const format6 = @import("cpu/thumb/format6.zig").format6;
+const format78 = @import("cpu/thumb/format78.zig").format78;
 const format9 = @import("cpu/thumb/format9.zig").format9;
 const format10 = @import("cpu/thumb/format10.zig").format10;
 const format12 = @import("cpu/thumb/format12.zig").format12;
@@ -450,8 +451,10 @@ fn thumbPopulate() [0x400]ThumbInstrFn {
 
                 lut[i] = format6(rd);
             } else if (i >> 6 & 0xF == 0b0101) {
-                // TODO: Format 7 and Format 8
-                lut[i] = thumbUndefined;
+                const op = i >> 5 & 0x3;
+                const T = i >> 3 & 1 == 1;
+
+                lut[i] = format78(op, T);
             } else if (i >> 7 & 0x7 == 0b000) {
                 const op = i >> 5 & 0x3;
                 const offset = i & 0x1F;
diff --git a/src/cpu/thumb/format10.zig b/src/cpu/thumb/format10.zig
index fef8198..d1093ab 100644
--- a/src/cpu/thumb/format10.zig
+++ b/src/cpu/thumb/format10.zig
@@ -14,7 +14,8 @@ pub fn format10(comptime L: bool, comptime offset: u5) InstrFn {
 
             if (L) {
                 // LDRH
-                cpu.r[rd] = bus.read16(address & 0xFFFF_FFFE);
+                const value = bus.read16(address & 0xFFFF_FFFE);
+                cpu.r[rd] = std.math.rotr(u32, @as(u32, value), 8 * (address & 1));
             } else {
                 // STRH
                 bus.write16(address & 0xFFFF_FFFE, @truncate(u16, cpu.r[rd]));
diff --git a/src/cpu/thumb/format78.zig b/src/cpu/thumb/format78.zig
new file mode 100644
index 0000000..7eae426
--- /dev/null
+++ b/src/cpu/thumb/format78.zig
@@ -0,0 +1,60 @@
+const std = @import("std");
+
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ThumbInstrFn;
+const u32SignExtend = @import("../../util.zig").u32SignExtend;
+
+pub fn format78(comptime op: u2, comptime T: bool) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
+            const ro = opcode >> 6 & 0x7;
+            const rb = opcode >> 3 & 0x7;
+            const rd = opcode & 0x7;
+
+            const address = cpu.r[rb] + cpu.r[ro];
+
+            if (T) {
+                switch (op) {
+                    0b00 => {
+                        // STRH
+                        bus.write16(address & 0xFFFF_FFFE, @truncate(u16, cpu.r[rd]));
+                    },
+                    0b01 => {
+                        // LDRH
+                        const value = bus.read16(address & 0xFFFF_FFFE);
+                        cpu.r[rd] = std.math.rotr(u32, @as(u32, value), 8 * (address & 1));
+                    },
+                    0b10 => {
+                        // LDSB
+                        cpu.r[rd] = u32SignExtend(8, @as(u32, bus.read8(address)));
+                    },
+                    0b11 => {
+                        // LDSH
+                        cpu.r[rd] = u32SignExtend(16, @as(u32, bus.read16(address & 0xFFFF_FFFE)));
+                    },
+                }
+            } else {
+                switch (op) {
+                    0b00 => {
+                        // STR
+                        bus.write32(address & 0xFFFF_FFFC, cpu.r[rd]);
+                    },
+                    0b01 => {
+                        // STRB
+                        bus.write8(address, @truncate(u8, cpu.r[rd]));
+                    },
+                    0b10 => {
+                        // LDR
+                        const value = bus.read32(address & 0xFFFF_FFFC);
+                        cpu.r[rd] = std.math.rotr(u32, value, 8 * (address & 0x3));
+                    },
+                    0b11 => {
+                        // LDRB
+                        cpu.r[rd] = bus.read8(address);
+                    },
+                }
+            }
+        }
+    }.inner;
+}
diff --git a/src/cpu/thumb/format9.zig b/src/cpu/thumb/format9.zig
index 2d807a7..fb772ad 100644
--- a/src/cpu/thumb/format9.zig
+++ b/src/cpu/thumb/format9.zig
@@ -18,7 +18,8 @@ pub fn format9(comptime B: bool, comptime L: bool, comptime offset: u5) InstrFn
                 } else {
                     // LDR
                     const address = cpu.r[rb] + (@as(u32, offset) << 2);
-                    cpu.r[rd] = bus.read32(address & 0xFFFF_FFFC);
+                    const value = bus.read32(address & 0xFFFF_FFFC);
+                    cpu.r[rd] = std.math.rotr(u32, value, 8 * (address & 0x3));
                 }
             } else {
                 if (B) {