From 83a53701967cb460e4d4d8955b32bb5650830fa7 Mon Sep 17 00:00:00 2001 From: Rekai Musuka Date: Fri, 21 Oct 2022 05:11:56 -0300 Subject: [PATCH] chore(cpu): refactor ARM functions to make room for THUMB --- src/cpu.zig | 16 ++++++++-------- src/cpu/{ => arm}/barrel_shifter.zig | 4 ++-- src/cpu/{ => arm}/block_data_transfer.zig | 6 +++--- src/cpu/{ => arm}/branch.zig | 8 ++++---- src/cpu/{ => arm}/data_processing.zig | 6 +++--- src/cpu/{ => arm}/half_signed_data_transfer.zig | 8 ++++---- src/cpu/{ => arm}/psr_transfer.zig | 6 +++--- src/cpu/{ => arm}/single_data_transfer.zig | 10 +++++----- 8 files changed, 32 insertions(+), 32 deletions(-) rename src/cpu/{ => arm}/barrel_shifter.zig (97%) rename src/cpu/{ => arm}/block_data_transfer.zig (93%) rename src/cpu/{ => arm}/branch.zig (78%) rename src/cpu/{ => arm}/data_processing.zig (96%) rename src/cpu/{ => arm}/half_signed_data_transfer.zig (92%) rename src/cpu/{ => arm}/psr_transfer.zig (92%) rename src/cpu/{ => arm}/single_data_transfer.zig (90%) diff --git a/src/cpu.zig b/src/cpu.zig index 4f31d3b..485f873 100644 --- a/src/cpu.zig +++ b/src/cpu.zig @@ -1,19 +1,19 @@ const std = @import("std"); const util = @import("util.zig"); -const BarrelShifter = @import("cpu/barrel_shifter.zig"); +const BarrelShifter = @import("cpu/arm/barrel_shifter.zig"); const Bus = @import("Bus.zig"); const Bit = @import("bitfield").Bit; const Bitfield = @import("bitfield").Bitfield; const Scheduler = @import("scheduler.zig").Scheduler; -const dataProcessing = @import("cpu/data_processing.zig").dataProcessing; -const psrTransfer = @import("cpu/psr_transfer.zig").psrTransfer; -const singleDataTransfer = @import("cpu/single_data_transfer.zig").singleDataTransfer; -const halfAndSignedDataTransfer = @import("cpu/half_signed_data_transfer.zig").halfAndSignedDataTransfer; -const blockDataTransfer = @import("cpu/block_data_transfer.zig").blockDataTransfer; -const branch = @import("cpu/branch.zig").branch; -const branchAndExchange = @import("cpu/branch.zig").branchAndExchange; +const dataProcessing = @import("cpu/arm/data_processing.zig").dataProcessing; +const psrTransfer = @import("cpu/arm/psr_transfer.zig").psrTransfer; +const singleDataTransfer = @import("cpu/arm/single_data_transfer.zig").singleDataTransfer; +const halfAndSignedDataTransfer = @import("cpu/arm/half_signed_data_transfer.zig").halfAndSignedDataTransfer; +const blockDataTransfer = @import("cpu/arm/block_data_transfer.zig").blockDataTransfer; +const branch = @import("cpu/arm/branch.zig").branch; +const branchAndExchange = @import("cpu/arm/branch.zig").branchAndExchange; pub const InstrFn = fn (*Arm7tdmi, *Bus, u32) void; const arm_lut: [0x1000]InstrFn = populate(); diff --git a/src/cpu/barrel_shifter.zig b/src/cpu/arm/barrel_shifter.zig similarity index 97% rename from src/cpu/barrel_shifter.zig rename to src/cpu/arm/barrel_shifter.zig index 31052d8..0f1fb76 100644 --- a/src/cpu/barrel_shifter.zig +++ b/src/cpu/arm/barrel_shifter.zig @@ -1,7 +1,7 @@ const std = @import("std"); -const Arm7tdmi = @import("../cpu.zig").Arm7tdmi; -const CPSR = @import("../cpu.zig").PSR; +const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi; +const CPSR = @import("../../cpu.zig").PSR; pub fn exec(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 { var shift_amt: u8 = undefined; diff --git a/src/cpu/block_data_transfer.zig b/src/cpu/arm/block_data_transfer.zig similarity index 93% rename from src/cpu/block_data_transfer.zig rename to src/cpu/arm/block_data_transfer.zig index 1ca46a1..b8d9011 100644 --- a/src/cpu/block_data_transfer.zig +++ b/src/cpu/arm/block_data_transfer.zig @@ -1,8 +1,8 @@ const std = @import("std"); -const Bus = @import("../Bus.zig"); -const Arm7tdmi = @import("../cpu.zig").Arm7tdmi; -const InstrFn = @import("../cpu.zig").InstrFn; +const Bus = @import("../../Bus.zig"); +const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi; +const InstrFn = @import("../../cpu.zig").InstrFn; pub fn blockDataTransfer(comptime P: bool, comptime U: bool, comptime S: bool, comptime W: bool, comptime L: bool) InstrFn { return struct { diff --git a/src/cpu/branch.zig b/src/cpu/arm/branch.zig similarity index 78% rename from src/cpu/branch.zig rename to src/cpu/arm/branch.zig index 01d2d9d..13bc02f 100644 --- a/src/cpu/branch.zig +++ b/src/cpu/arm/branch.zig @@ -1,9 +1,9 @@ const std = @import("std"); -const util = @import("../util.zig"); +const util = @import("../../util.zig"); -const Bus = @import("../Bus.zig"); -const Arm7tdmi = @import("../cpu.zig").Arm7tdmi; -const InstrFn = @import("../cpu.zig").InstrFn; +const Bus = @import("../../Bus.zig"); +const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi; +const InstrFn = @import("../../cpu.zig").InstrFn; pub fn branch(comptime L: bool) InstrFn { return struct { diff --git a/src/cpu/data_processing.zig b/src/cpu/arm/data_processing.zig similarity index 96% rename from src/cpu/data_processing.zig rename to src/cpu/arm/data_processing.zig index 9b96690..4c5482f 100644 --- a/src/cpu/data_processing.zig +++ b/src/cpu/arm/data_processing.zig @@ -1,9 +1,9 @@ const std = @import("std"); const BarrelShifter = @import("barrel_shifter.zig"); -const Bus = @import("../Bus.zig"); -const Arm7tdmi = @import("../cpu.zig").Arm7tdmi; -const InstrFn = @import("../cpu.zig").InstrFn; +const Bus = @import("../../Bus.zig"); +const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi; +const InstrFn = @import("../../cpu.zig").InstrFn; pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4) InstrFn { return struct { diff --git a/src/cpu/half_signed_data_transfer.zig b/src/cpu/arm/half_signed_data_transfer.zig similarity index 92% rename from src/cpu/half_signed_data_transfer.zig rename to src/cpu/arm/half_signed_data_transfer.zig index 44ab3e0..29631d6 100644 --- a/src/cpu/half_signed_data_transfer.zig +++ b/src/cpu/arm/half_signed_data_transfer.zig @@ -1,9 +1,9 @@ const std = @import("std"); -const util = @import("../util.zig"); +const util = @import("../../util.zig"); -const Bus = @import("../Bus.zig"); -const Arm7tdmi = @import("../cpu.zig").Arm7tdmi; -const InstrFn = @import("../cpu.zig").InstrFn; +const Bus = @import("../../Bus.zig"); +const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi; +const InstrFn = @import("../../cpu.zig").InstrFn; pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I: bool, comptime W: bool, comptime L: bool) InstrFn { return struct { diff --git a/src/cpu/psr_transfer.zig b/src/cpu/arm/psr_transfer.zig similarity index 92% rename from src/cpu/psr_transfer.zig rename to src/cpu/arm/psr_transfer.zig index a2d2bb9..39d271c 100644 --- a/src/cpu/psr_transfer.zig +++ b/src/cpu/arm/psr_transfer.zig @@ -1,8 +1,8 @@ const std = @import("std"); -const Bus = @import("../Bus.zig"); -const Arm7tdmi = @import("../cpu.zig").Arm7tdmi; -const InstrFn = @import("../cpu.zig").InstrFn; +const Bus = @import("../../Bus.zig"); +const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi; +const InstrFn = @import("../../cpu.zig").InstrFn; pub fn psrTransfer(comptime I: bool, comptime isSpsr: bool) InstrFn { return struct { diff --git a/src/cpu/single_data_transfer.zig b/src/cpu/arm/single_data_transfer.zig similarity index 90% rename from src/cpu/single_data_transfer.zig rename to src/cpu/arm/single_data_transfer.zig index 2ab1e69..5486e2e 100644 --- a/src/cpu/single_data_transfer.zig +++ b/src/cpu/arm/single_data_transfer.zig @@ -1,11 +1,11 @@ const std = @import("std"); -const util = @import("../util.zig"); +const util = @import("../../util.zig"); const BarrelShifter = @import("barrel_shifter.zig"); -const Bus = @import("../Bus.zig"); -const Arm7tdmi = @import("../cpu.zig").Arm7tdmi; -const CPSR = @import("../cpu.zig").PSR; -const InstrFn = @import("../cpu.zig").InstrFn; +const Bus = @import("../../Bus.zig"); +const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi; +const CPSR = @import("../../cpu.zig").PSR; +const InstrFn = @import("../../cpu.zig").InstrFn; pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool, comptime B: bool, comptime W: bool, comptime L: bool) InstrFn { return struct {