diff --git a/src/cpu.zig b/src/cpu.zig
index ab24a65..30704f2 100644
--- a/src/cpu.zig
+++ b/src/cpu.zig
@@ -25,6 +25,7 @@ const format3 = @import("cpu/thumb/format3.zig").format3;
 const format5 = @import("cpu/thumb/format5.zig").format5;
 const format6 = @import("cpu/thumb/format6.zig").format6;
 const format12 = @import("cpu/thumb/format12.zig").format12;
+const format16 = @import("cpu/thumb/format16.zig").format16;
 
 pub const ArmInstrFn = fn (*Arm7tdmi, *Bus, u32) void;
 pub const ThumbInstrFn = fn (*Arm7tdmi, *Bus, u16) void;
@@ -288,7 +289,7 @@ inline fn thumbIdx(opcode: u16) u10 {
     return @truncate(u10, opcode >> 6);
 }
 
-fn checkCond(cpsr: PSR, cond: u4) bool {
+pub fn checkCond(cpsr: PSR, cond: u4) bool {
     // TODO: Should I implement an enum?
     return switch (cond) {
         0x0 => cpsr.z.read(), // EQ - Equal
@@ -351,6 +352,12 @@ fn thumbPopulate() [0x400]ThumbInstrFn {
 
                 lut[i] = format12(isSP, rd);
             }
+
+            if (i >> 6 & 0xF == 0b1101) {
+                const cond = i >> 2 & 0xF;
+
+                lut[i] = format16(cond);
+            }
         }
 
         return lut;
diff --git a/src/cpu/thumb/format16.zig b/src/cpu/thumb/format16.zig
new file mode 100644
index 0000000..9846f52
--- /dev/null
+++ b/src/cpu/thumb/format16.zig
@@ -0,0 +1,22 @@
+const std = @import("std");
+
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ThumbInstrFn;
+const checkCond = @import("../../cpu.zig").checkCond;
+const u32SignExtend = @import("../../util.zig").u32SignExtend;
+
+pub fn format16(comptime cond: u4) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
+            const offset = (opcode & 0xFF) << 1;
+
+            const do_execute = switch (cond) {
+                0xE, 0xF => std.debug.panic("[CPU/THUMB] Undefined conditional branch with condition {}", .{cond}),
+                else => checkCond(cpu.cpsr, cond),
+            };
+
+            if (do_execute) cpu.r[15] = (cpu.fakePC() & 0xFFFF_FFFC) +% u32SignExtend(8, offset);
+        }
+    }.inner;
+}