diff --git a/src/cpu/arm/half_signed_data_transfer.zig b/src/cpu/arm/half_signed_data_transfer.zig
index d5a0e81..9c20e0b 100644
--- a/src/cpu/arm/half_signed_data_transfer.zig
+++ b/src/cpu/arm/half_signed_data_transfer.zig
@@ -47,13 +47,11 @@ pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I:
                     },
                     0b11 => {
                         // LDRSH
-                        const value = if (address & 1 == 1) blk: {
+                        result = if (address & 1 == 1) blk: {
                             break :blk sext(8, bus.read(u8, address));
                         } else blk: {
                             break :blk sext(16, bus.read(u16, address));
                         };
-
-                        result = rotr(u32, value, 8 * (address & 1));
                     },
                     0b00 => unreachable, // SWP
                 }
diff --git a/src/cpu/thumb/data_transfer.zig b/src/cpu/thumb/data_transfer.zig
index d9610e2..542ffee 100644
--- a/src/cpu/thumb/data_transfer.zig
+++ b/src/cpu/thumb/data_transfer.zig
@@ -45,13 +45,11 @@ pub fn format78(comptime op: u2, comptime T: bool) InstrFn {
                     },
                     0b11 => {
                         // LDRSH
-                        const value = if (address & 1 == 1) blk: {
+                        cpu.r[rd] = if (address & 1 == 1) blk: {
                             break :blk sext(8, bus.read(u8, address));
                         } else blk: {
                             break :blk sext(16, bus.read(u16, address));
                         };
-
-                        cpu.r[rd] = rotr(u32, value, 8 * (address & 1));
                     },
                 }
             } else {