From 2fb01577af34aa7d97052ba1509222f20a4302a1 Mon Sep 17 00:00:00 2001 From: Rekai Musuka Date: Fri, 21 Oct 2022 05:11:57 -0300 Subject: [PATCH] feat(cpu): implement some already decoded format 3 instructions --- src/cpu/thumb/format3.zig | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/src/cpu/thumb/format3.zig b/src/cpu/thumb/format3.zig index d759c7b..7939113 100644 --- a/src/cpu/thumb/format3.zig +++ b/src/cpu/thumb/format3.zig @@ -11,16 +11,33 @@ pub fn format3(comptime op: u2, comptime rd: u3) InstrFn { switch (op) { 0b00 => { + // MOV cpu.r[rd] = offset; cpu.cpsr.n.unset(); cpu.cpsr.z.write(offset == 0); }, 0b01 => { - std.debug.panic("TODO: Implement cmp R{}, #0x{X:0>2}", .{ rd, offset }); + // CMP + const left = cpu.r[rd]; + const result = left -% offset; + + cpu.cpsr.n.write(result >> 31 & 1 == 1); + cpu.cpsr.z.write(result == 0); + cpu.cpsr.c.write(offset <= left); + cpu.cpsr.v.write(((left ^ result) & (~offset ^ result)) >> 31 & 1 == 1); }, 0b10 => { - std.debug.panic("TODO: Implement add R{}, #0x{X:0>2}", .{ rd, offset }); + const left = cpu.r[rd]; + + var result: u32 = undefined; + const didOverflow = @addWithOverflow(u32, left, offset, &result); + cpu.r[rd] = result; + + cpu.cpsr.n.write(result >> 31 & 1 == 1); + cpu.cpsr.z.write(result == 0); + cpu.cpsr.c.write(didOverflow); + cpu.cpsr.v.write(((left ^ result) & (offset ^ result)) >> 31 & 1 == 1); }, 0b11 => { std.debug.panic("TODO: Implement sub R{}, #0x{X:0>2}", .{ rd, offset });