From 1f9eeedfe8a1b76335069c5a8932174337617fdc Mon Sep 17 00:00:00 2001
From: Rekai Musuka <rekai@musuka.dev>
Date: Fri, 26 Aug 2022 19:23:50 -0500
Subject: [PATCH] fix: impl workaround for stage2 miscompilation

---
 src/core/cpu.zig | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/core/cpu.zig b/src/core/cpu.zig
index 08e5334..e54a5fa 100644
--- a/src/core/cpu.zig
+++ b/src/core/cpu.zig
@@ -682,7 +682,8 @@ const Pipline = struct {
     pub fn step(self: *Self, cpu: *Arm7tdmi, comptime T: type) ?u32 {
         comptime std.debug.assert(T == u32 or T == u16);
 
-        const opcode = self.stage[0];
+        // FIXME: https://github.com/ziglang/zig/issues/12642
+        const opcode = self.stage[0..1][0];
 
         self.stage[0] = self.stage[1];
         self.stage[1] = cpu.bus.read(T, cpu.r[15]);