From 036b861b0568dd1c867a1c58060ac3e3a091756f Mon Sep 17 00:00:00 2001 From: Rekai Musuka Date: Fri, 21 Oct 2022 05:11:50 -0300 Subject: [PATCH] chore: code cleanup --- src/Bus.zig | 4 ++-- src/bus/io.zig | 5 ++--- src/cpu.zig | 6 ++---- src/cpu/barrel_shifter.zig | 5 ++--- src/cpu/branch.zig | 6 ++---- src/cpu/data_processing.zig | 5 ++--- src/cpu/half_signed_data_transfer.zig | 5 ++--- src/cpu/single_data_transfer.zig | 7 +++---- src/main.zig | 2 +- src/ppu.zig | 5 +++-- src/scheduler.zig | 1 + src/util.zig | 7 +++---- 12 files changed, 25 insertions(+), 33 deletions(-) diff --git a/src/Bus.zig b/src/Bus.zig index f6cf866..da3876b 100644 --- a/src/Bus.zig +++ b/src/Bus.zig @@ -1,10 +1,10 @@ const std = @import("std"); -const Scheduler = @import("scheduler.zig").Scheduler; -const Io = @import("bus/io.zig").Io; const Bios = @import("bus/Bios.zig"); const GamePak = @import("bus/GamePak.zig"); +const Io = @import("bus/io.zig").Io; const Ppu = @import("ppu.zig").Ppu; +const Scheduler = @import("scheduler.zig").Scheduler; const Allocator = std.mem.Allocator; diff --git a/src/bus/io.zig b/src/bus/io.zig index cba2492..039c501 100644 --- a/src/bus/io.zig +++ b/src/bus/io.zig @@ -1,8 +1,7 @@ const std = @import("std"); -const bitfield = @import("bitfield"); -const Bitfield = bitfield.Bitfield; -const Bit = bitfield.Bit; +const Bit = @import("bitfield").Bit; +const Bitfield = @import("bitfield").Bitfield; pub const Io = struct { const Self = @This(); diff --git a/src/cpu.zig b/src/cpu.zig index 096cfda..eb7c0ec 100644 --- a/src/cpu.zig +++ b/src/cpu.zig @@ -1,14 +1,12 @@ const std = @import("std"); const util = @import("util.zig"); -const bitfield = @import("bitfield"); const BarrelShifter = @import("cpu/barrel_shifter.zig"); const Bus = @import("Bus.zig"); +const Bit = @import("bitfield").Bit; +const Bitfield = @import("bitfield").Bitfield; const Scheduler = @import("scheduler.zig").Scheduler; -const Bitfield = bitfield.Bitfield; -const Bit = bitfield.Bit; - const dataProcessing = @import("cpu/data_processing.zig").dataProcessing; const singleDataTransfer = @import("cpu/single_data_transfer.zig").singleDataTransfer; const halfAndSignedDataTransfer = @import("cpu/half_signed_data_transfer.zig").halfAndSignedDataTransfer; diff --git a/src/cpu/barrel_shifter.zig b/src/cpu/barrel_shifter.zig index 6a935f6..49611cc 100644 --- a/src/cpu/barrel_shifter.zig +++ b/src/cpu/barrel_shifter.zig @@ -1,8 +1,7 @@ const std = @import("std"); -const arm = @import("../cpu.zig"); -const Arm7tdmi = arm.Arm7tdmi; -const CPSR = arm.CPSR; +const Arm7tdmi = @import("../cpu.zig").Arm7tdmi; +const CPSR = @import("../cpu.zig").CPSR; pub inline fn exec(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 { var shift_amt: u8 = undefined; diff --git a/src/cpu/branch.zig b/src/cpu/branch.zig index 7708ae1..71b6d90 100644 --- a/src/cpu/branch.zig +++ b/src/cpu/branch.zig @@ -1,10 +1,8 @@ -const arm = @import("../cpu.zig"); const util = @import("../util.zig"); const Bus = @import("../Bus.zig"); - -const Arm7tdmi = arm.Arm7tdmi; -const InstrFn = arm.InstrFn; +const Arm7tdmi = @import("../cpu.zig").Arm7tdmi; +const InstrFn = @import("../cpu.zig").InstrFn; pub fn branch(comptime L: bool) InstrFn { return struct { diff --git a/src/cpu/data_processing.zig b/src/cpu/data_processing.zig index 68b665d..012bfbd 100644 --- a/src/cpu/data_processing.zig +++ b/src/cpu/data_processing.zig @@ -1,10 +1,9 @@ const std = @import("std"); -const arm = @import("../cpu.zig"); const BarrelShifter = @import("barrel_shifter.zig"); const Bus = @import("../Bus.zig"); -const Arm7tdmi = arm.Arm7tdmi; -const InstrFn = arm.InstrFn; +const Arm7tdmi = @import("../cpu.zig").Arm7tdmi; +const InstrFn = @import("../cpu.zig").InstrFn; pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4) InstrFn { return struct { diff --git a/src/cpu/half_signed_data_transfer.zig b/src/cpu/half_signed_data_transfer.zig index e5875af..7ad507b 100644 --- a/src/cpu/half_signed_data_transfer.zig +++ b/src/cpu/half_signed_data_transfer.zig @@ -1,10 +1,9 @@ const std = @import("std"); -const arm = @import("../cpu.zig"); const util = @import("../util.zig"); const Bus = @import("../Bus.zig"); -const Arm7tdmi = arm.Arm7tdmi; -const InstrFn = arm.InstrFn; +const Arm7tdmi = @import("../cpu.zig").Arm7tdmi; +const InstrFn = @import("../cpu.zig").InstrFn; pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I: bool, comptime W: bool, comptime L: bool) InstrFn { return struct { diff --git a/src/cpu/single_data_transfer.zig b/src/cpu/single_data_transfer.zig index fb934d5..17daf5f 100644 --- a/src/cpu/single_data_transfer.zig +++ b/src/cpu/single_data_transfer.zig @@ -1,12 +1,11 @@ const std = @import("std"); const util = @import("../util.zig"); -const arm = @import("../cpu.zig"); const BarrelShifter = @import("barrel_shifter.zig"); const Bus = @import("../Bus.zig"); -const Arm7tdmi = arm.Arm7tdmi; -const InstrFn = arm.InstrFn; -const CPSR = arm.CPSR; +const Arm7tdmi = @import("../cpu.zig").Arm7tdmi; +const CPSR = @import("../cpu.zig").CPSR; +const InstrFn = @import("../cpu.zig").InstrFn; pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool, comptime B: bool, comptime W: bool, comptime L: bool) InstrFn { return struct { diff --git a/src/main.zig b/src/main.zig index 986e7de..f7b2b67 100644 --- a/src/main.zig +++ b/src/main.zig @@ -1,9 +1,9 @@ const std = @import("std"); const emu = @import("emu.zig"); -const Scheduler = @import("scheduler.zig").Scheduler; const Bus = @import("Bus.zig"); const Arm7tdmi = @import("cpu.zig").Arm7tdmi; +const Scheduler = @import("scheduler.zig").Scheduler; pub fn main() anyerror!void { var gpa = std.heap.GeneralPurposeAllocator(.{}){}; diff --git a/src/ppu.zig b/src/ppu.zig index b9e4b2c..e4989fa 100644 --- a/src/ppu.zig +++ b/src/ppu.zig @@ -1,8 +1,9 @@ const std = @import("std"); -const Allocator = std.mem.Allocator; -const Scheduler = @import("scheduler.zig").Scheduler; const EventKind = @import("scheduler.zig").EventKind; +const Scheduler = @import("scheduler.zig").Scheduler; + +const Allocator = std.mem.Allocator; pub const Ppu = struct { vram: Vram, diff --git a/src/scheduler.zig b/src/scheduler.zig index d86daa1..8b57d81 100644 --- a/src/scheduler.zig +++ b/src/scheduler.zig @@ -2,6 +2,7 @@ const std = @import("std"); const Bus = @import("Bus.zig"); const Arm7tdmi = @import("cpu.zig").Arm7tdmi; + const Order = std.math.Order; const PriorityQueue = std.PriorityQueue; const Allocator = std.mem.Allocator; diff --git a/src/util.zig b/src/util.zig index a34eed6..1e9f143 100644 --- a/src/util.zig +++ b/src/util.zig @@ -1,13 +1,12 @@ const std = @import("std"); -const assert = std.debug.assert; pub fn signExtend(comptime T: type, comptime bits: usize, value: anytype) T { const ValT = comptime @TypeOf(value); - comptime assert(isInteger(ValT)); - comptime assert(isSigned(ValT)); + comptime std.debug.assert(isInteger(ValT)); + comptime std.debug.assert(isSigned(ValT)); const value_bits = @typeInfo(ValT).Int.bits; - comptime assert(value_bits >= bits); + comptime std.debug.assert(value_bits >= bits); const bit_diff = value_bits - bits;