From 0027d3f8a3e89a5d1ff8e0dcb8cd75ae2cff746c Mon Sep 17 00:00:00 2001 From: Rekai Musuka Date: Sun, 11 Sep 2022 07:38:55 -0300 Subject: [PATCH] chore: comment open bus impl --- src/core/Bus.zig | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/src/core/Bus.zig b/src/core/Bus.zig index fee57bc..3b27953 100644 --- a/src/core/Bus.zig +++ b/src/core/Bus.zig @@ -116,28 +116,38 @@ pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T { fn readOpenBus(self: *const Self, comptime T: type, address: u32) T { const r15 = self.cpu.?.r[15]; - const word = if (self.cpu.?.cpsr.t.read()) blk: { + const word = blk: { + // If u32 Open Bus, read recently fetched opcode (PC + 8) + if (!self.cpu.?.cpsr.t.read()) break :blk self.dbgRead(u32, r15 + 4); const page = @truncate(u8, r15 >> 24); switch (page) { // EWRAM, PALRAM, VRAM, and Game ROM (16-bit) 0x02, 0x05, 0x06, 0x08...0x0D => { + // (PC + 4) const halfword = self.dbgRead(u16, r15 + 2); + break :blk @as(u32, halfword) << 16 | halfword; }, // BIOS or OAM (32-bit) 0x00, 0x07 => { + // Aligned: (PC + 6) | (PC + 4) + // Unaligned: (PC + 4) | (PC + 2) const offset: u32 = if (address & 3 == 0b00) 2 else 0; - break :blk @as(u32, self.dbgRead(u16, (r15 + 2) + offset)) << 16 | self.dbgRead(u16, r15 + offset); + + break :blk @as(u32, self.dbgRead(u16, r15 + 2 + offset)) << 16 | self.dbgRead(u16, r15 + offset); }, // IWRAM (16-bit but special) 0x03 => { + // Aligned: (PC + 2) | (PC + 4) + // Unaligned: (PC + 4) | (PC + 2) const offset: u32 = if (address & 3 == 0b00) 2 else 0; - break :blk @as(u32, self.dbgRead(u16, (r15 + 2) - offset)) << 16 | self.dbgRead(u16, r15 + offset); + + break :blk @as(u32, self.dbgRead(u16, r15 + 2 - offset)) << 16 | self.dbgRead(u16, r15 + offset); }, else => unreachable, } - } else self.dbgRead(u32, r15 + 4); + }; return @truncate(T, rotr(u32, word, 8 * (address & 3))); }