From 0ad017cf436818a41430d100c8cce4790d21696a Mon Sep 17 00:00:00 2001 From: Rekai Musuka Date: Mon, 12 Feb 2024 18:24:43 -0600 Subject: [PATCH] chore: upgrade to Zig v2024.1.0-mach --- .gitignore | 3 ++- .gitmodules | 6 ------ build.zig | 21 ++++++++++----------- build.zig.zon | 22 ++++++++++++++++------ dl_sdl2.ps1 | 32 ++++++++++++++++++++++++++++++++ lib/SDL.zig | 2 +- lib/arm32 | 1 - lib/zba-gdbstub | 1 - lib/zgui | 2 +- src/core/emu.zig | 2 +- src/core/io.zig | 16 ++++++++-------- src/core/nds7/Bios.zig | 3 +-- src/core/nds7/Bus.zig | 15 ++++++--------- src/core/nds9/Bios.zig | 3 +-- src/core/nds9/Bus.zig | 16 ++++++---------- src/core/nds9/io.zig | 12 ++++++------ src/main.zig | 4 ++-- src/platform.zig | 2 +- 18 files changed, 94 insertions(+), 69 deletions(-) create mode 100644 dl_sdl2.ps1 delete mode 160000 lib/arm32 delete mode 160000 lib/zba-gdbstub diff --git a/.gitignore b/.gitignore index edb258c..7429489 100644 --- a/.gitignore +++ b/.gitignore @@ -2,4 +2,5 @@ zig-cache/ zig-out/ bin/ doc/ -imgui.ini \ No newline at end of file +imgui.ini +.build_config/ diff --git a/.gitmodules b/.gitmodules index 0fc3ea0..15089b6 100644 --- a/.gitmodules +++ b/.gitmodules @@ -4,9 +4,3 @@ [submodule "lib/zgui"] path = lib/zgui url = https://git.musuka.dev/paoda/zgui -[submodule "lib/arm32"] - path = lib/arm32 - url = https://git.musuka.dev/paoda/arm32.git -[submodule "lib/zba-gdbstub"] - path = lib/zba-gdbstub - url = https://git.musuka.dev/paoda/zba-gdbstub diff --git a/build.zig b/build.zig index 10e4ee3..863d13d 100644 --- a/build.zig +++ b/build.zig @@ -2,8 +2,6 @@ const std = @import("std"); const Sdk = @import("lib/SDL.zig/build.zig"); const zgui = @import("lib/zgui/build.zig"); -const arm32 = @import("lib/arm32/build.zig"); -const gdbstub = @import("lib/zba-gdbstub/build.zig"); // Although this function looks imperative, note that its job is to // declaratively construct a build graph that will be executed by an external @@ -29,22 +27,23 @@ pub fn build(b: *std.Build) void { .optimize = optimize, }); - exe.addModule("arm32", arm32.module(b)); - exe.addModule("gdbstub", gdbstub.module(b)); - exe.addModule("zig-clap", b.dependency("zig-clap", .{}).module("clap")); + exe.root_module.addImport("arm32", b.dependency("arm32", .{}).module("arm32")); + exe.root_module.addImport("gdbstub", b.dependency("zba-gdbstub", .{}).module("gdbstub")); + exe.root_module.addImport("zig-clap", b.dependency("zig-clap", .{}).module("clap")); - exe.addAnonymousModule("bitfield", .{ .source_file = .{ .path = "lib/bitfield.zig" } }); // https://github.com/FlorenceOS/ - exe.addAnonymousModule("gl", .{ .source_file = .{ .path = "lib/gl.zig" } }); // https://github.com/MasterQ32/zig-opengl + exe.root_module.addAnonymousImport("bitfield", .{ .root_source_file = .{ .path = "lib/bitfield.zig" } }); // https://github.com/FlorenceOS/ + exe.root_module.addAnonymousImport("gl", .{ .root_source_file = .{ .path = "lib/gl.zig" } }); // https://github.com/MasterQ32/zig-opengl // https://github.com/MasterQ32/SDL.zig const sdk = Sdk.init(b, null); - sdk.link(exe, .dynamic); - exe.addModule("sdl2", sdk.getNativeModule()); + sdk.link(exe, .static); + exe.root_module.addImport("sdl2", sdk.getNativeModule()); // https://git.musuka.dev/paoda/zgui - // .shared option should stay in sync with SDL.zig call above where true == .dynamic, and false == .static - const zgui_pkg = zgui.package(b, target, optimize, .{ .options = .{ .backend = .sdl2_opengl3, .shared = true } }); + + const zgui_pkg = zgui.package(b, target, optimize, .{ .options = .{ .backend = .sdl2_opengl3 } }); zgui_pkg.link(exe); + sdk.link(zgui_pkg.zgui_c_cpp, .static); // This declares intent for the executable to be installed into the // standard location when the user invokes the "install" step (the default diff --git a/build.zig.zon b/build.zig.zon index 676982c..ca4cdec 100644 --- a/build.zig.zon +++ b/build.zig.zon @@ -1,15 +1,25 @@ .{ .name = "turbo", .version = "0.1.0", + .paths = .{ + "lib/bitfield.zig", + "lib/gl.zig", + "src", + "build.zig", + "build.zig.zon", + }, .dependencies = .{ .@"zig-clap" = .{ - .url = "https://github.com/Hejsil/zig-clap/archive/f49b94700e0761b7514abdca0e4f0e7f3f938a93.tar.gz", - .hash = "1220f48518ce22882e102255ed3bcdb7aeeb4891f50b2cdd3bd74b5b2e24d3149ba2", + .url = "https://github.com/Hejsil/zig-clap/archive/4267b0b60ef6f87cccf3ee6ed481e6d0759180c6.tar.gz", + .hash = "12202fa30d679d821292bcd953458b9e76097a5d16999489125a206db63a53392833", }, - .@"zba-util" = .{ - // Necessary to use paoda/arm32 as a git submodule - .url = "https://git.musuka.dev/paoda/zba-util/archive/322c798e384a0d24cc84ffcfa2e4a3ca807798a0.tar.gz", - .hash = "12209ce0e729460b997706e47a53a32f1842672cd120189e612f4871731780a30ed0", + .@"zba-gdbstub" = .{ + .url = "https://git.musuka.dev/paoda/zba-gdbstub/archive/8d2c76e410357166f092008ff5c7f7f097a043a7.tar.gz", + .hash = "1220a171c7e14769386e3f4aab6aed53b5e176d654bdf1428a15b972effed750bf30", + }, + .arm32 = .{ + .url = "https://git.musuka.dev/paoda/arm32/archive/6f0e27136072610e6dba97ff8aaf5e2ec86e2c09.tar.gz", + .hash = "122047d0affe12b9e9e9c655a7ba6d51b311f02d688e9f1c9a91394a03103f1c0cd5", }, }, } diff --git a/dl_sdl2.ps1 b/dl_sdl2.ps1 new file mode 100644 index 0000000..88cc6e9 --- /dev/null +++ b/dl_sdl2.ps1 @@ -0,0 +1,32 @@ +$SDL2Version = "2.30.0" +$ArchiveFile = ".\SDL2-devel-mingw.zip" +$Json = @" +{ + "x86_64-windows-gnu": { + "include": "SDL2\\include", + "libs": "SDL2\\lib", + "bin": "SDL2\\bin" + } +} +"@ + +New-Item -Force -ItemType Directory -Path .\.build_config +Set-Location -Path .build_config -PassThru + +if (!(Test-Path -PathType Leaf $ArchiveFile)) { + Invoke-WebRequest "https://github.com/libsdl-org/SDL/releases/download/release-$SDL2Version/SDL2-devel-$SDL2Version-mingw.zip" -OutFile $ArchiveFile +} + +Expand-Archive $ArchiveFile + +if (Test-Path -PathType Leaf .\SDL2) { + Remove-Item -Recurse .\SDL2 +} + +New-Item -Force -ItemType Directory -Path .\SDL2 +Get-ChildItem -Path ".\SDL2-devel-mingw\SDL2-$SDL2Version\x86_64-w64-mingw32" | Move-Item -Destination .\SDL2 + +New-Item -Force .\sdl.json -Value $Json + +Remove-Item -Recurse .\SDL2-devel-mingw +Set-Location -Path .. -PassThru diff --git a/lib/SDL.zig b/lib/SDL.zig index 80e7409..6d42434 160000 --- a/lib/SDL.zig +++ b/lib/SDL.zig @@ -1 +1 @@ -Subproject commit 80e7409e21ebbf0bd182b34b6e0206cc26e5ca05 +Subproject commit 6d42434c4d92efb1199d58f821edb7f701812f7e diff --git a/lib/arm32 b/lib/arm32 deleted file mode 160000 index bdc4bfc..0000000 --- a/lib/arm32 +++ /dev/null @@ -1 +0,0 @@ -Subproject commit bdc4bfc6423f173e28d1ee8a4608d0d90e1da3f3 diff --git a/lib/zba-gdbstub b/lib/zba-gdbstub deleted file mode 160000 index eb8e517..0000000 --- a/lib/zba-gdbstub +++ /dev/null @@ -1 +0,0 @@ -Subproject commit eb8e5175bd9738e92d10c47f75abb174f3624082 diff --git a/lib/zgui b/lib/zgui index ca27a47..1fff275 160000 --- a/lib/zgui +++ b/lib/zgui @@ -1 +1 @@ -Subproject commit ca27a472249a70dd1e94fb94f05f26dd931363fb +Subproject commit 1fff275f8d322d44355a08f2eac3e7c4905fc382 diff --git a/src/core/emu.zig b/src/core/emu.zig index 925fb5d..8c239a1 100644 --- a/src/core/emu.zig +++ b/src/core/emu.zig @@ -407,7 +407,7 @@ pub fn fastBoot(system: System) void { pub const debug = struct { const Interface = @import("gdbstub").Emulator; const Server = @import("gdbstub").Server; - const AtomicBool = std.atomic.Atomic(bool); + const AtomicBool = std.atomic.Value(bool); const log = std.log.scoped(.gdbstub); const nds7 = struct { diff --git a/src/core/io.zig b/src/core/io.zig index 3461c99..608aa5f 100644 --- a/src/core/io.zig +++ b/src/core/io.zig @@ -415,22 +415,22 @@ pub const KeyInput = extern union { const AtomicKeyInput = struct { const Self = @This(); - const Ordering = std.atomic.Ordering; + const AtomicOrder = std.builtin.AtomicOrder; inner: KeyInput = .{ .raw = 0x03FF }, - pub inline fn load(self: *const Self, comptime ordering: Ordering) u16 { - return switch (ordering) { + pub inline fn load(self: *const Self, comptime order: AtomicOrder) u16 { + return switch (order) { .AcqRel, .Release => @compileError("not supported for atomic loads"), - else => @atomicLoad(u16, &self.inner.raw, ordering), + else => @atomicLoad(u16, &self.inner.raw, order), }; } - pub inline fn fetchOr(self: *Self, value: u16, comptime ordering: Ordering) void { - _ = @atomicRmw(u16, &self.inner.raw, .Or, value, ordering); + pub inline fn fetchOr(self: *Self, value: u16, comptime order: AtomicOrder) void { + _ = @atomicRmw(u16, &self.inner.raw, .Or, value, order); } - pub inline fn fetchAnd(self: *Self, value: u16, comptime ordering: Ordering) void { - _ = @atomicRmw(u16, &self.inner.raw, .And, value, ordering); + pub inline fn fetchAnd(self: *Self, value: u16, comptime order: AtomicOrder) void { + _ = @atomicRmw(u16, &self.inner.raw, .And, value, order); } }; diff --git a/src/core/nds7/Bios.zig b/src/core/nds7/Bios.zig index 9bff1ce..b651f76 100644 --- a/src/core/nds7/Bios.zig +++ b/src/core/nds7/Bios.zig @@ -29,7 +29,6 @@ pub fn deinit(self: @This(), allocator: Allocator) void { // Note: Parts of 16MiB addrspace that aren't mapped to BIOS are typically undefined pub fn read(self: *const @This(), comptime T: type, address: u32) T { - const readInt = std.mem.readIntLittle; const byte_count = @divExact(@typeInfo(T).Int.bits, 8); // if (address >= len) return 0x0000_0000; // TODO: What is undefined actually? @@ -39,7 +38,7 @@ pub fn read(self: *const @This(), comptime T: type, address: u32) T { @panic("TODO: ability to load in NDS7 BIOS just-in-time"); }; - return readInt(T, ptr[address & (len - 1) ..][0..byte_count]); + return std.mem.readInt(T, ptr[address & (len - 1) ..][0..byte_count], .little); } pub fn write(_: *const @This(), comptime T: type, address: u32, value: T) void { diff --git a/src/core/nds7/Bus.zig b/src/core/nds7/Bus.zig index f3b8172..b36cdf1 100644 --- a/src/core/nds7/Bus.zig +++ b/src/core/nds7/Bus.zig @@ -62,8 +62,6 @@ pub fn dbgRead(self: *@This(), comptime T: type, address: u32) T { fn _read(self: *@This(), comptime T: type, comptime mode: Mode, address: u32) T { const byte_count = @divExact(@typeInfo(T).Int.bits, 8); - const readInt = std.mem.readIntLittle; - const aligned_addr = forceAlign(T, address); switch (mode) { @@ -74,12 +72,12 @@ fn _read(self: *@This(), comptime T: type, comptime mode: Mode, address: u32) T return switch (aligned_addr) { 0x0000_0000...0x01FF_FFFF => self.bios.read(T, address), - 0x0200_0000...0x02FF_FFFF => readInt(T, self.main[aligned_addr & 0x003F_FFFF ..][0..byte_count]), + 0x0200_0000...0x02FF_FFFF => std.mem.readInt(T, self.main[aligned_addr & 0x003F_FFFF ..][0..byte_count], .little), 0x0300_0000...0x037F_FFFF => switch (self.io.shr.wramcnt.mode.read()) { - 0b00 => readInt(T, self.wram[aligned_addr & 0x0000_FFFF ..][0..byte_count]), + 0b00 => std.mem.readInt(T, self.wram[aligned_addr & 0x0000_FFFF ..][0..byte_count], .little), else => self.shr_wram.read(T, .nds7, aligned_addr), }, - 0x0380_0000...0x03FF_FFFF => readInt(T, self.wram[aligned_addr & 0x0000_FFFF ..][0..byte_count]), + 0x0380_0000...0x03FF_FFFF => std.mem.readInt(T, self.wram[aligned_addr & 0x0000_FFFF ..][0..byte_count], .little), 0x0400_0000...0x04FF_FFFF => io.read(self, T, aligned_addr), 0x0600_0000...0x06FF_FFFF => self.vram.read(T, .nds7, aligned_addr), @@ -97,7 +95,6 @@ pub fn dbgWrite(self: *@This(), comptime T: type, address: u32, value: T) void { fn _write(self: *@This(), comptime T: type, comptime mode: Mode, address: u32, value: T) void { const byte_count = @divExact(@typeInfo(T).Int.bits, 8); - const writeInt = std.mem.writeIntLittle; const aligned_addr = forceAlign(T, address); @@ -109,12 +106,12 @@ fn _write(self: *@This(), comptime T: type, comptime mode: Mode, address: u32, v switch (aligned_addr) { 0x0000_0000...0x01FF_FFFF => self.bios.write(T, address, value), - 0x0200_0000...0x02FF_FFFF => writeInt(T, self.main[aligned_addr & 0x003F_FFFF ..][0..byte_count], value), + 0x0200_0000...0x02FF_FFFF => std.mem.writeInt(T, self.main[aligned_addr & 0x003F_FFFF ..][0..byte_count], value, .little), 0x0300_0000...0x037F_FFFF => switch (self.io.shr.wramcnt.mode.read()) { - 0b00 => writeInt(T, self.wram[aligned_addr & 0x0000_FFFF ..][0..byte_count], value), + 0b00 => std.mem.writeInt(T, self.wram[aligned_addr & 0x0000_FFFF ..][0..byte_count], value, .little), else => self.shr_wram.write(T, .nds7, aligned_addr, value), }, - 0x0380_0000...0x03FF_FFFF => writeInt(T, self.wram[aligned_addr & 0x0000_FFFF ..][0..byte_count], value), + 0x0380_0000...0x03FF_FFFF => std.mem.writeInt(T, self.wram[aligned_addr & 0x0000_FFFF ..][0..byte_count], value, .little), 0x0400_0000...0x04FF_FFFF => io.write(self, T, aligned_addr, value), 0x0600_0000...0x06FF_FFFF => self.vram.write(T, .nds7, aligned_addr, value), else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }), diff --git a/src/core/nds9/Bios.zig b/src/core/nds9/Bios.zig index daf831b..d6b5657 100644 --- a/src/core/nds9/Bios.zig +++ b/src/core/nds9/Bios.zig @@ -31,7 +31,6 @@ pub fn deinit(self: @This(), allocator: Allocator) void { // Note: Parts of 16MiB addrspace that aren't mapped to BIOS are typically undefined pub fn read(self: *const @This(), comptime T: type, address: u32) T { - const readInt = std.mem.readIntLittle; const byte_count = @divExact(@typeInfo(T).Int.bits, 8); // if (address >= len) return 0x0000_0000; // TODO: What is undefined actually? @@ -41,7 +40,7 @@ pub fn read(self: *const @This(), comptime T: type, address: u32) T { @panic("TODO: ability to load in NDS9 BIOS just-in-time"); }; - return readInt(T, ptr[address & (len - 1) ..][0..byte_count]); + return std.mem.readInt(T, ptr[address & (len - 1) ..][0..byte_count], .little); } pub fn write(_: *const @This(), comptime T: type, address: u32, value: T) void { diff --git a/src/core/nds9/Bus.zig b/src/core/nds9/Bus.zig index da3159c..c8bfc74 100644 --- a/src/core/nds9/Bus.zig +++ b/src/core/nds9/Bus.zig @@ -66,8 +66,6 @@ pub fn dbgRead(self: *@This(), comptime T: type, address: u32) T { fn _read(self: *@This(), comptime T: type, comptime mode: Mode, address: u32) T { const byte_count = @divExact(@typeInfo(T).Int.bits, 8); - const readInt = std.mem.readIntLittle; - const aligned_addr = forceAlign(T, address); switch (mode) { @@ -77,12 +75,12 @@ fn _read(self: *@This(), comptime T: type, comptime mode: Mode, address: u32) T } return switch (aligned_addr) { - 0x0200_0000...0x02FF_FFFF => readInt(T, self.main[aligned_addr & (4 * MiB - 1) ..][0..byte_count]), + 0x0200_0000...0x02FF_FFFF => std.mem.readInt(T, self.main[aligned_addr & (4 * MiB - 1) ..][0..byte_count], .little), 0x0300_0000...0x03FF_FFFF => self.wram.read(T, .nds9, aligned_addr), 0x0400_0000...0x04FF_FFFF => io.read(self, T, aligned_addr), - 0x0500_0000...0x05FF_FFFF => readInt(T, self.makeshift_palram[aligned_addr & (2 * KiB - 1) ..][0..@sizeOf(T)]), + 0x0500_0000...0x05FF_FFFF => std.mem.readInt(T, self.makeshift_palram[aligned_addr & (2 * KiB - 1) ..][0..@sizeOf(T)], .little), 0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(T, .nds9, aligned_addr), - 0x0700_0000...0x07FF_FFFF => readInt(T, self.ppu.oam.buf[aligned_addr & (2 * KiB - 1) ..][0..byte_count]), + 0x0700_0000...0x07FF_FFFF => std.mem.readInt(T, self.ppu.oam.buf[aligned_addr & (2 * KiB - 1) ..][0..byte_count], .little), 0xFFFF_0000...0xFFFF_FFFF => self.bios.read(T, address), else => warn("unexpected: read(T: {}, addr: 0x{X:0>8}) {} ", .{ T, address, T }), }; @@ -98,8 +96,6 @@ pub fn dbgWrite(self: *@This(), comptime T: type, address: u32, value: T) void { fn _write(self: *@This(), comptime T: type, comptime mode: Mode, address: u32, value: T) void { const byte_count = @divExact(@typeInfo(T).Int.bits, 8); - const writeInt = std.mem.writeIntLittle; - const aligned_addr = forceAlign(T, address); switch (mode) { @@ -109,12 +105,12 @@ fn _write(self: *@This(), comptime T: type, comptime mode: Mode, address: u32, v } switch (aligned_addr) { - 0x0200_0000...0x02FF_FFFF => writeInt(T, self.main[aligned_addr & (4 * MiB - 1) ..][0..byte_count], value), + 0x0200_0000...0x02FF_FFFF => std.mem.writeInt(T, self.main[aligned_addr & (4 * MiB - 1) ..][0..byte_count], value, .little), 0x0300_0000...0x03FF_FFFF => self.wram.write(T, .nds9, aligned_addr, value), 0x0400_0000...0x04FF_FFFF => io.write(self, T, aligned_addr, value), - 0x0500_0000...0x05FF_FFFF => writeInt(T, self.makeshift_palram[aligned_addr & (2 * KiB - 1) ..][0..@sizeOf(T)], value), + 0x0500_0000...0x05FF_FFFF => std.mem.writeInt(T, self.makeshift_palram[aligned_addr & (2 * KiB - 1) ..][0..@sizeOf(T)], value, .little), 0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(T, .nds9, aligned_addr, value), - 0x0700_0000...0x07FF_FFFF => writeInt(T, self.ppu.oam.buf[aligned_addr & (2 * KiB - 1) ..][0..@sizeOf(T)], value), + 0x0700_0000...0x07FF_FFFF => std.mem.writeInt(T, self.ppu.oam.buf[aligned_addr & (2 * KiB - 1) ..][0..@sizeOf(T)], value, .little), 0xFFFF_0000...0xFFFF_FFFF => self.bios.write(T, address, value), else => log.warn("unexpected: write(T: {}, addr: 0x{X:0>8}, value: 0x{X:0>8})", .{ T, address, value }), } diff --git a/src/core/nds9/io.zig b/src/core/nds9/io.zig index d692d72..e3cb2d9 100644 --- a/src/core/nds9/io.zig +++ b/src/core/nds9/io.zig @@ -55,7 +55,7 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) T { u32 => switch (address) { // DMA Transfers 0x0400_00B0...0x0400_00DC => dma.read(T, &bus.dma, address) orelse 0x0000_0000, - 0x0400_00E0...0x0400_00EC => std.mem.readIntLittle(T, bus.io.dma_fill[address & 0xF ..][0..@sizeOf(T)]), + 0x0400_00E0...0x0400_00EC => std.mem.readInt(T, bus.io.dma_fill[address & 0xF ..][0..@sizeOf(T)], .little), // Timers 0x0400_0100...0x0400_010C => warn("TODO: impl timer", .{}), @@ -89,7 +89,7 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) T { // DMA Transfers 0x0400_00B0...0x0400_00DE => dma.read(T, &bus.dma, address) orelse 0x0000, - 0x0400_00E0...0x0400_00EE => std.mem.readIntLittle(T, bus.io.dma_fill[address & 0xF ..][0..@sizeOf(T)]), + 0x0400_00E0...0x0400_00EE => std.mem.readInt(T, bus.io.dma_fill[address & 0xF ..][0..@sizeOf(T)], .little), // Timers 0x0400_0100...0x0400_010E => warn("TODO: impl timer", .{}), @@ -122,7 +122,7 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) T { u8 => switch (address) { // DMA Transfers 0x0400_00B0...0x0400_00DF => dma.read(T, &bus.dma, address) orelse 0x00, - 0x0400_00E0...0x0400_00EF => std.mem.readIntLittle(T, bus.io.dma_fill[address & 0xF ..][0..@sizeOf(T)]), + 0x0400_00E0...0x0400_00EF => std.mem.readInt(T, bus.io.dma_fill[address & 0xF ..][0..@sizeOf(T)], .little), // Timers 0x0400_0100...0x0400_010F => warn("TODO: impl timer", .{}), @@ -170,7 +170,7 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void { // DMA Transfers 0x0400_00B0...0x0400_00DC => dma.write(T, &bus.dma, address, value), - 0x0400_00E0...0x0400_00EC => std.mem.writeIntLittle(T, bus.io.dma_fill[address & 0xF ..][0..@sizeOf(T)], value), + 0x0400_00E0...0x0400_00EC => std.mem.writeInt(T, bus.io.dma_fill[address & 0xF ..][0..@sizeOf(T)], value, .little), // Timers 0x0400_0100...0x0400_010C => log.warn("TODO: impl timer", .{}), @@ -262,7 +262,7 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void { // DMA Transfers 0x0400_00B0...0x0400_00DE => dma.write(T, &bus.dma, address, value), - 0x0400_00E0...0x0400_00EE => std.mem.writeIntLittle(T, bus.io.dma_fill[address & 0xF ..][0..@sizeOf(T)], value), + 0x0400_00E0...0x0400_00EE => std.mem.writeInt(T, bus.io.dma_fill[address & 0xF ..][0..@sizeOf(T)], value, .little), // Timers 0x0400_0100...0x0400_010E => log.warn("TODO: impl timer", .{}), @@ -302,7 +302,7 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void { u8 => switch (address) { // DMA Transfers 0x0400_00B0...0x0400_00DF => dma.write(T, &bus.dma, address, value), - 0x0400_00E0...0x0400_00EF => std.mem.writeIntLittle(T, bus.io.dma_fill[address & 0xF ..][0..@sizeOf(T)], value), + 0x0400_00E0...0x0400_00EF => std.mem.writeInt(T, bus.io.dma_fill[address & 0xF ..][0..@sizeOf(T)], value, .little), // Timers 0x0400_0100...0x0400_010F => log.warn("TODO: impl timer", .{}), diff --git a/src/main.zig b/src/main.zig index 6cbc7b6..c9355a5 100644 --- a/src/main.zig +++ b/src/main.zig @@ -27,7 +27,7 @@ pub fn main() !void { const allocator = gpa.allocator(); - const result = try clap.parse(clap.Help, &cli_params, clap.parsers.default, .{}); + const result = try clap.parse(clap.Help, &cli_params, clap.parsers.default, .{ .allocator = allocator }); defer result.deinit(); const rom_path = try handlePositional(result); @@ -75,7 +75,7 @@ pub fn main() !void { ui.setTitle(rom_title); try ui.run(&scheduler, system); } else { - var should_quit: std.atomic.Atomic(bool) = std.atomic.Atomic(bool).init(false); + var should_quit: std.atomic.Value(bool) = std.atomic.Value(bool).init(false); try emu.debug.run(allocator, system, &scheduler, &should_quit); } diff --git a/src/platform.zig b/src/platform.zig index a5fcf17..6a82b12 100644 --- a/src/platform.zig +++ b/src/platform.zig @@ -33,7 +33,7 @@ pub const Ui = struct { state: imgui.State, pub fn init(allocator: Allocator) !Self { - var state = imgui.State{}; + const state = imgui.State{}; if (SDL.SDL_Init(SDL.SDL_INIT_VIDEO | SDL.SDL_INIT_EVENTS | SDL.SDL_INIT_AUDIO) < 0) panic(); if (SDL.SDL_GL_SetAttribute(SDL.SDL_GL_CONTEXT_PROFILE_MASK, SDL.SDL_GL_CONTEXT_PROFILE_CORE) < 0) panic();