diff --git a/src/bus.rs b/src/bus.rs index 897e21c..420b42e 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -1,13 +1,13 @@ -use super::cartridge::Cartridge; -use super::high_ram::HighRam; -use super::instruction::Cycle; -use super::interrupt::{Interrupt, InterruptFlag}; -use super::joypad::Joypad; -use super::ppu::{Ppu, PpuMode}; -use super::serial::Serial; -use super::sound::Sound; -use super::timer::Timer; -use super::work_ram::{VariableWorkRam, WorkRam}; +use crate::cartridge::Cartridge; +use crate::high_ram::HighRam; +use crate::instruction::Cycle; +use crate::interrupt::{Interrupt, InterruptFlag}; +use crate::joypad::Joypad; +use crate::ppu::{Ppu, PpuMode}; +use crate::serial::Serial; +use crate::sound::Sound; +use crate::timer::Timer; +use crate::work_ram::{VariableWorkRam, WorkRam}; use std::{fs::File, io::Read}; const BOOT_ROM_SIZE: usize = 0x100; @@ -73,14 +73,27 @@ impl Bus { self.timer.step(cycles); self.sound.step(cycles); } + pub(crate) fn step_dma(&mut self, pending: Cycle) { + let pending_cycles: u32 = pending.into(); + + for _ in 0..pending_cycles { + match self.ppu.dma.clock() { + Some((src_addr, dest_addr)) => { + let byte = self.read_byte(src_addr); + self.write_byte(dest_addr, byte); + } + None => {} + } + } + } pub(crate) fn timer(&self) -> Timer { self.timer } } -impl Bus { - pub(crate) fn read_byte(&self, addr: u16) -> u8 { +impl BusIo for Bus { + fn read_byte(&self, addr: u16) -> u8 { match addr { 0x0000..=0x3FFF => { // 16KB ROM bank 00 @@ -193,7 +206,7 @@ impl Bus { } } - pub(crate) fn write_byte(&mut self, addr: u16, byte: u8) { + fn write_byte(&mut self, addr: u16, byte: u8) { match addr { 0x0000..=0x3FFF => { // 16KB ROM bank 00 @@ -322,7 +335,9 @@ impl Bus { } } } +} +impl Bus { pub(crate) fn read_word(&self, addr: u16) -> u16 { (self.read_byte(addr + 1) as u16) << 8 | self.read_byte(addr) as u16 } @@ -375,24 +390,9 @@ impl Bus { // Update the Timer's instance of the following interrupts self.timer.set_interrupt(timer); } - - pub(crate) fn boot_enabled(&self) -> bool { - self.boot.is_some() - } } -impl Bus { - pub(crate) fn step_dma(&mut self, pending: Cycle) { - let pending_cycles: u32 = pending.into(); - - for _ in 0..pending_cycles { - match self.ppu.dma.clock() { - Some((src_addr, dest_addr)) => { - let byte = self.read_byte(src_addr); - self.write_byte(dest_addr, byte); - } - None => {} - } - } - } +pub(crate) trait BusIo { + fn read_byte(&self, addr: u16) -> u8; + fn write_byte(&mut self, addr: u16, byte: u8); } diff --git a/src/cartridge.rs b/src/cartridge.rs index 5e61ca8..cf3a059 100644 --- a/src/cartridge.rs +++ b/src/cartridge.rs @@ -2,6 +2,8 @@ use std::fs::File; use std::io::{self, Read}; use std::path::Path; +use crate::bus::BusIo; + const RAM_SIZE_ADDRESS: usize = 0x0149; const ROM_SIZE_ADDRESS: usize = 0x0148; const MBC_TYPE_ADDRESS: usize = 0x0147; @@ -86,8 +88,8 @@ impl Cartridge { } } -impl Cartridge { - pub(crate) fn read_byte(&self, addr: u16) -> u8 { +impl BusIo for Cartridge { + fn read_byte(&self, addr: u16) -> u8 { use MbcResult::*; match self.mbc.handle_read(addr) { @@ -95,18 +97,10 @@ impl Cartridge { Value(byte) => byte, } } - pub(crate) fn write_byte(&mut self, addr: u16, byte: u8) { + + fn write_byte(&mut self, addr: u16, byte: u8) { self.mbc.handle_write(addr, byte); } - - pub(crate) fn read_word(&self, addr: u16) -> u16 { - (self.read_byte(addr + 1) as u16) << 8 | self.read_byte(addr) as u16 - } - - pub(crate) fn write_word(&mut self, addr: u16, word: u16) { - self.write_byte(addr + 1, (word >> 8) as u8); - self.write_byte(addr, (word & 0x00FF) as u8); - } } #[derive(Debug, Clone, Default)] @@ -294,7 +288,7 @@ enum RamSize { } impl RamSize { - pub(crate) fn as_byte_count(&self) -> u32 { + fn as_byte_count(&self) -> u32 { use RamSize::*; match *self { @@ -354,7 +348,7 @@ impl Default for BankCount { impl BankCount { // https://hacktix.github.io/GBEDG/mbcs/#rom-size - pub(crate) fn to_byte_count(self) -> u32 { + fn to_byte_count(self) -> u32 { use BankCount::*; match self { diff --git a/src/cpu.rs b/src/cpu.rs index e77f044..5c200d4 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -1,7 +1,7 @@ -use super::bus::Bus; -use super::instruction::{Cycle, Instruction}; -use super::interrupt::{InterruptEnable, InterruptFlag}; -use super::ppu::Ppu; +use crate::bus::{Bus, BusIo}; +use crate::instruction::{Cycle, Instruction}; +use crate::interrupt::{InterruptEnable, InterruptFlag}; +use crate::ppu::Ppu; use bitfield::bitfield; use std::fmt::{Display, Formatter, Result as FmtResult}; @@ -62,10 +62,16 @@ impl Cpu { self.halted } + #[cfg(feature = "debug")] pub(crate) fn inc_pc(&mut self) { self.reg.pc += 1; } + #[cfg(not(feature = "debug"))] + fn inc_pc(&mut self) { + self.reg.pc += 1; + } + pub fn load_cartridge(&mut self, path: &str) -> std::io::Result<()> { self.bus.load_cartridge(path) } @@ -76,15 +82,27 @@ impl Cpu { } impl Cpu { + #[cfg(feature = "debug")] pub(crate) fn fetch(&self) -> u8 { self.bus.read_byte(self.reg.pc) } + #[cfg(not(feature = "debug"))] + fn fetch(&self) -> u8 { + self.bus.read_byte(self.reg.pc) + } + + #[cfg(feature = "debug")] pub(crate) fn decode(&mut self, opcode: u8) -> Instruction { Instruction::from_byte(self, opcode) } - pub(crate) fn execute(&mut self, instruction: Instruction) -> Cycle { + #[cfg(not(feature = "debug"))] + pub(crate) fn decode(&mut self, opcode: u8) -> Instruction { + Instruction::from_byte(self, opcode) + } + + fn execute(&mut self, instruction: Instruction) -> Cycle { Instruction::execute(self, instruction) } @@ -127,6 +145,16 @@ impl Cpu { } } +impl BusIo for Cpu { + fn read_byte(&self, addr: u16) -> u8 { + self.bus.read_byte(addr) + } + + fn write_byte(&mut self, addr: u16, byte: u8) { + self.bus.write_byte(addr, byte); + } +} + impl Cpu { pub(crate) fn read_imm_byte(&mut self, addr: u16) -> u8 { self.inc_pc(); // NB: the addr read in the line below will be equal to PC - 1 after this function call @@ -139,18 +167,6 @@ impl Cpu { self.bus.read_word(addr) } - pub(crate) fn read_byte(&self, addr: u16) -> u8 { - self.bus.read_byte(addr) - } - - pub(crate) fn write_byte(&mut self, addr: u16, byte: u8) { - self.bus.write_byte(addr, byte); - } - - pub(crate) fn read_word(&mut self, addr: u16) -> u16 { - self.bus.read_word(addr) - } - pub(crate) fn write_word(&mut self, addr: u16, word: u16) { self.bus.write_word(addr, word) } @@ -290,6 +306,21 @@ impl Cpu { } } + #[cfg(feature = "debug")] + pub fn register_pair(&self, pair: RegisterPair) -> u16 { + use RegisterPair::*; + + match pair { + AF => (self.reg.a as u16) << 8 | u8::from(self.flags) as u16, + BC => (self.reg.b as u16) << 8 | self.reg.c as u16, + DE => (self.reg.d as u16) << 8 | self.reg.e as u16, + HL => (self.reg.h as u16) << 8 | self.reg.l as u16, + SP => self.reg.sp, + PC => self.reg.pc, + } + } + + #[cfg(not(feature = "debug"))] pub(crate) fn register_pair(&self, pair: RegisterPair) -> u16 { use RegisterPair::*; @@ -341,7 +372,7 @@ impl Cpu { } impl Cpu { - pub(crate) fn log_state(&self, mut writer: impl std::io::Write) -> std::io::Result<()> { + fn _log_state(&self, mut writer: impl std::io::Write) -> std::io::Result<()> { write!(writer, "A: {:02X} ", self.reg.a)?; write!(writer, "F: {:02X} ", u8::from(self.flags))?; write!(writer, "B: {:02X} ", self.reg.b)?; @@ -374,6 +405,18 @@ pub(crate) enum Register { Flag, } +#[cfg(feature = "debug")] +#[derive(Debug, Copy, Clone)] +pub enum RegisterPair { + AF, + BC, + DE, + HL, + SP, + PC, +} + +#[cfg(not(feature = "debug"))] #[derive(Debug, Copy, Clone)] pub(crate) enum RegisterPair { AF, diff --git a/src/gui.rs b/src/gui.rs index 7e31d91..94134ce 100644 --- a/src/gui.rs +++ b/src/gui.rs @@ -1,3 +1,4 @@ +use crate::bus::BusIo; use crate::cpu::Register; use crate::cpu::RegisterPair; use crate::LR35902; @@ -19,7 +20,7 @@ pub struct Egui { render_pass: RenderPass, paint_jobs: Vec, - pub(crate) config: Configuration, + pub config: Configuration, show_flags: bool, show_cpu_info: bool, @@ -30,7 +31,7 @@ pub struct Egui { #[cfg(feature = "debug")] show_disasm: bool, #[cfg(feature = "debug")] - pub(crate) break_point: Option, + pub break_point: Option, } impl Egui { @@ -320,9 +321,9 @@ impl Egui { let mut spacebar_step = self.config.spacebar_step; egui::Window::new("Configuration") .open(&mut self.config.show) - .show(ctx, |ui| { + .show(ctx, |_ui| { #[cfg(feature = "debug")] - ui.horizontal(|ui| { + _ui.horizontal(|ui| { ui.label("Spacebar Steps"); ui.add(egui::Slider::u16(&mut spacebar_step, 0..=std::u16::MAX)); }); @@ -367,14 +368,14 @@ impl Egui { } } -pub(crate) struct Configuration { +pub struct Configuration { /// Show Configuration egui menu show: bool, /// How many [`LR35902`] .step() do we want to do at once /// when pressing the spacebar key? #[cfg(feature = "debug")] - pub(crate) spacebar_step: u16, + pub spacebar_step: u16, } impl Default for Configuration { diff --git a/src/high_ram.rs b/src/high_ram.rs index 2e62a05..7d1b84b 100644 --- a/src/high_ram.rs +++ b/src/high_ram.rs @@ -1,3 +1,5 @@ +use crate::bus::BusIo; + const HIGH_RAM_SIZE: usize = 0x7F; const HIGH_RAM_START_ADDRESS: usize = 0xFF80; @@ -14,12 +16,12 @@ impl Default for HighRam { } } -impl HighRam { - pub(crate) fn write_byte(&mut self, addr: u16, byte: u8) { +impl BusIo for HighRam { + fn write_byte(&mut self, addr: u16, byte: u8) { self.buf[addr as usize - HIGH_RAM_START_ADDRESS] = byte; } - pub(crate) fn read_byte(&self, addr: u16) -> u8 { + fn read_byte(&self, addr: u16) -> u8 { self.buf[addr as usize - HIGH_RAM_START_ADDRESS] } } diff --git a/src/instruction.rs b/src/instruction.rs index 34f9a08..11b205f 100644 --- a/src/instruction.rs +++ b/src/instruction.rs @@ -1,4 +1,5 @@ -use super::cpu::{Cpu, Flags, HaltState, ImeState, Register, RegisterPair}; +use crate::bus::BusIo; +use crate::cpu::{Cpu, Flags, HaltState, ImeState, Register, RegisterPair}; use std::{convert::TryFrom, fmt::Debug}; #[derive(Copy, Clone)] @@ -1911,7 +1912,7 @@ impl TryFrom for Register { } impl Table { - pub(crate) fn r(index: u8) -> InstrRegister { + fn r(index: u8) -> InstrRegister { match index { 0 => InstrRegister::B, 1 => InstrRegister::C, @@ -1925,7 +1926,7 @@ impl Table { } } - pub(crate) fn rp2(index: u8) -> RegisterPair { + fn rp2(index: u8) -> RegisterPair { match index { 0 => RegisterPair::BC, 1 => RegisterPair::DE, @@ -1935,7 +1936,7 @@ impl Table { } } - pub(crate) fn rp(index: u8) -> RegisterPair { + fn rp(index: u8) -> RegisterPair { match index { 0 => RegisterPair::BC, 1 => RegisterPair::DE, @@ -1945,7 +1946,7 @@ impl Table { } } - pub(crate) fn cc(index: u8) -> JumpCondition { + fn cc(index: u8) -> JumpCondition { match index { 0 => JumpCondition::NotZero, 1 => JumpCondition::Zero, @@ -1955,7 +1956,7 @@ impl Table { } } - pub(crate) fn x2_alu(index: u8, r_index: u8) -> Instruction { + fn x2_alu(index: u8, r_index: u8) -> Instruction { match index { 0 => Instruction::ADD( // ADD A, r[z] @@ -1973,7 +1974,7 @@ impl Table { } } - pub(crate) fn x3_alu(index: u8, n: u8) -> Instruction { + fn x3_alu(index: u8, n: u8) -> Instruction { match index { 0 => Instruction::ADD( // ADD A, n @@ -1991,7 +1992,7 @@ impl Table { } } - pub(crate) fn rot(index: u8, r_index: u8) -> Instruction { + fn rot(index: u8, r_index: u8) -> Instruction { match index { 0 => Instruction::RLC(Self::r(r_index)), // RLC r[z] 1 => Instruction::RRC(Self::r(r_index)), // RRC r[z] @@ -2275,13 +2276,13 @@ impl From for u32 { } impl InstrRegisterPair { - pub(crate) fn to_register_pair(self) -> RegisterPair { + fn to_register_pair(self) -> RegisterPair { RegisterPair::try_from(self).expect("Failed to convert InstrRegisterPair to RegisterPair") } } impl InstrRegister { - pub(crate) fn to_register(self) -> Register { + fn to_register(self) -> Register { Register::try_from(self).expect("Failed to convert from InstrRegister to Register") } } diff --git a/src/ppu.rs b/src/ppu.rs index 8b665e8..1e63ed3 100644 --- a/src/ppu.rs +++ b/src/ppu.rs @@ -1,3 +1,4 @@ +use crate::bus::BusIo; use crate::Cycle; use crate::GB_HEIGHT; use crate::GB_WIDTH; @@ -10,7 +11,7 @@ use types::{ ObjectPaletteId, ObjectSize, Pixels, RenderPriority, TileDataAddress, }; -pub(crate) mod dma; +mod dma; mod types; const VRAM_SIZE: usize = 0x2000; @@ -38,7 +39,7 @@ pub struct Ppu { pub(crate) control: LCDControl, pub(crate) monochrome: Monochrome, pub(crate) pos: ScreenPosition, - pub(crate) vram: Box<[u8; VRAM_SIZE]>, + vram: Box<[u8; VRAM_SIZE]>, pub(crate) stat: LCDStatus, pub(crate) oam: ObjectAttributeTable, pub(crate) dma: DmaProcess, @@ -52,12 +53,12 @@ pub struct Ppu { cycle: Cycle, } -impl Ppu { - pub(crate) fn read_byte(&self, addr: u16) -> u8 { +impl BusIo for Ppu { + fn read_byte(&self, addr: u16) -> u8 { self.vram[addr as usize - PPU_START_ADDRESS] } - pub(crate) fn write_byte(&mut self, addr: u16, byte: u8) { + fn write_byte(&mut self, addr: u16, byte: u8) { self.vram[addr as usize - PPU_START_ADDRESS] = byte; } } @@ -504,18 +505,20 @@ pub(crate) struct ObjectAttributeTable { buf: Box<[u8; OAM_SIZE]>, } -impl ObjectAttributeTable { - pub(crate) fn read_byte(&self, addr: u16) -> u8 { +impl BusIo for ObjectAttributeTable { + fn read_byte(&self, addr: u16) -> u8 { let index = (addr - 0xFE00) as usize; self.buf[index] } - pub(crate) fn write_byte(&mut self, addr: u16, byte: u8) { + fn write_byte(&mut self, addr: u16, byte: u8) { let index = (addr - 0xFE00) as usize; self.buf[index] = byte; } +} - pub(crate) fn attribute(&self, index: usize) -> ObjectAttribute { +impl ObjectAttributeTable { + fn attribute(&self, index: usize) -> ObjectAttribute { let start = index * 4; let slice: &[u8; 4] = self.buf[start..(start + 4)] @@ -535,7 +538,7 @@ impl Default for ObjectAttributeTable { } #[derive(Debug, Clone, Copy, Default, PartialEq, Eq)] -pub(crate) struct ObjectAttribute { +struct ObjectAttribute { y: u8, x: u8, tile_index: u8, @@ -571,7 +574,7 @@ struct ObjectBuffer { } impl ObjectBuffer { - pub(crate) fn iter(&self) -> std::slice::Iter<'_, Option> { + fn iter(&self) -> std::slice::Iter<'_, Option> { self.into_iter() } } @@ -597,21 +600,21 @@ impl<'a> IntoIterator for &'a mut ObjectBuffer { } impl ObjectBuffer { - pub(crate) fn is_full(&self) -> bool { + fn is_full(&self) -> bool { self.len == OBJECT_LIMIT } - pub(crate) fn clear(&mut self) { + fn clear(&mut self) { self.buf = [Default::default(); 10]; self.len = 0; } - pub(crate) fn add(&mut self, attr: ObjectAttribute) { + fn add(&mut self, attr: ObjectAttribute) { self.buf[self.len] = Some(attr); self.len += 1; } - pub(crate) fn remove(&mut self, attr: &ObjectAttribute) { + fn remove(&mut self, attr: &ObjectAttribute) { let maybe_index = self.buf.iter().position(|maybe_attr| match maybe_attr { Some(other_attr) => attr == other_attr, None => false, @@ -640,13 +643,13 @@ struct PixelFetcher { } impl PixelFetcher { - pub(crate) fn hblank_reset(&mut self) { + fn hblank_reset(&mut self) { self.back.hblank_reset(); self.obj.hblank_reset(); self.x_pos = 0; } - pub(crate) fn vblank_reset(&mut self) { + fn vblank_reset(&mut self) { self.back.vblank_reset(); } @@ -716,11 +719,7 @@ impl PixelFetcher { } } - pub(crate) fn get_obj_addr( - attr: &ObjectAttribute, - pos: &ScreenPosition, - size: ObjectSize, - ) -> u16 { + fn get_obj_addr(attr: &ObjectAttribute, pos: &ScreenPosition, size: ObjectSize) -> u16 { let line_y = pos.line_y; // TODO: Why is the offset 14 and 30 respectively? @@ -841,21 +840,21 @@ struct WindowLineCounter { } impl WindowLineCounter { - pub(crate) fn increment(&mut self) { + fn increment(&mut self) { self.count += 1; } - pub(crate) fn vblank_reset(&mut self) { + fn vblank_reset(&mut self) { self.count = 0; } - pub(crate) fn count(&self) -> u8 { + fn count(&self) -> u8 { self.count } } #[derive(Debug, Clone, Copy)] -pub(crate) enum FetcherState { +enum FetcherState { TileNumber, ToLowByteSleep, TileLowByte, @@ -894,15 +893,15 @@ struct FifoRenderer { } impl FifoRenderer { - pub(crate) fn is_enabled(&self) -> bool { + fn is_enabled(&self) -> bool { self.enabled } - pub(crate) fn pause(&mut self) { + fn pause(&mut self) { self.enabled = false; } - pub(crate) fn resume(&mut self) { + fn resume(&mut self) { self.enabled = true; } } @@ -925,19 +924,19 @@ struct TileBuilder { } impl TileBuilder { - pub(crate) fn with_id(&mut self, id: u8) { + fn with_id(&mut self, id: u8) { self.id = Some(id); } - pub(crate) fn with_low_byte(&mut self, data: u8) { + fn with_low_byte(&mut self, data: u8) { self.low = Some(data); } - pub(crate) fn with_high_byte(&mut self, data: u8) { + fn with_high_byte(&mut self, data: u8) { self.high = Some(data); } - pub(crate) fn bytes(&self) -> Option<(u8, u8)> { + fn bytes(&self) -> Option<(u8, u8)> { self.high.zip(self.low) } } @@ -949,25 +948,25 @@ struct OamScanState { } impl OamScanState { - pub(crate) fn increase(&mut self) { + fn increase(&mut self) { self.count += 1; self.count %= 40; } - pub(crate) fn reset(&mut self) { + fn reset(&mut self) { self.count = Default::default(); self.mode = Default::default(); } - pub(crate) fn count(&self) -> u8 { + fn count(&self) -> u8 { self.count } - pub(crate) fn mode(&self) -> OamScanMode { + fn mode(&self) -> OamScanMode { self.mode } - pub(crate) fn next(&mut self) { + fn next(&mut self) { use OamScanMode::*; self.mode = match self.mode { @@ -999,19 +998,19 @@ struct WindowStatus { } impl WindowStatus { - pub(crate) fn should_draw(&self) -> bool { + fn should_draw(&self) -> bool { self.should_draw } - pub(crate) fn coincidence(&self) -> bool { + fn coincidence(&self) -> bool { self.coincidence } - pub(crate) fn set_should_draw(&mut self, value: bool) { + fn set_should_draw(&mut self, value: bool) { self.should_draw = value; } - pub(crate) fn set_coincidence(&mut self, value: bool) { + fn set_coincidence(&mut self, value: bool) { self.coincidence = value; } diff --git a/src/ppu/types.rs b/src/ppu/types.rs index de41f2d..27ac28a 100644 --- a/src/ppu/types.rs +++ b/src/ppu/types.rs @@ -1,6 +1,5 @@ use super::{BLACK, DARK_GRAY, LIGHT_GRAY, WHITE}; use bitfield::bitfield; -use std::convert::TryInto; bitfield! { pub struct LCDStatus(u8); @@ -435,20 +434,6 @@ impl GrayShade { GrayShade::Black => BLACK, } } - - pub(crate) fn from_rgba(slice: &[u8]) -> Self { - let rgba: [u8; 4] = slice - .try_into() - .expect("Unable to interpret &[u8] as [u8; 4]"); - - match rgba { - WHITE => GrayShade::White, - LIGHT_GRAY => GrayShade::LightGray, - DARK_GRAY => GrayShade::DarkGray, - BLACK => GrayShade::Black, - _ => panic!("{:#04X?} is not a colour the DMG-01 supports", rgba), - } - } } impl Default for GrayShade { diff --git a/src/sound.rs b/src/sound.rs index 024f323..0cd81af 100644 --- a/src/sound.rs +++ b/src/sound.rs @@ -79,12 +79,6 @@ impl From for FrequencyLow { } } -pub(crate) fn get_11bit_freq(low: &FrequencyLow, high: FrequencyHigh) -> u16 { - let high_bits = high.0 & 0b111; - - (low.0 as u16) << 8 | ((high_bits as u16) << 4) -} - #[derive(Debug, Clone, Copy)] enum FrequencyType { Counter = 0, diff --git a/src/work_ram.rs b/src/work_ram.rs index 6654807..df587f6 100644 --- a/src/work_ram.rs +++ b/src/work_ram.rs @@ -1,3 +1,5 @@ +use crate::bus::BusIo; + const WORK_RAM_SIZE: usize = 0x1000; const VARIABLE_WORK_RAM_SIZE: usize = WORK_RAM_SIZE; const WORK_RAM_START_ADDRESS: usize = 0xC000; @@ -8,12 +10,12 @@ pub(crate) struct WorkRam { bank: Box<[u8; WORK_RAM_SIZE]>, } -impl WorkRam { - pub(crate) fn write_byte(&mut self, addr: u16, byte: u8) { +impl BusIo for WorkRam { + fn write_byte(&mut self, addr: u16, byte: u8) { self.bank[addr as usize - WORK_RAM_START_ADDRESS] = byte; } - pub(crate) fn read_byte(&self, addr: u16) -> u8 { + fn read_byte(&self, addr: u16) -> u8 { self.bank[addr as usize - WORK_RAM_START_ADDRESS] } } @@ -27,7 +29,7 @@ impl Default for WorkRam { } #[derive(Debug, Clone, Copy)] -pub(crate) enum BankNumber { +enum BankNumber { One = 1, Two = 2, Three = 3, @@ -53,19 +55,21 @@ impl Default for VariableWorkRam { } impl VariableWorkRam { - pub(crate) fn set_current_bank(&mut self, bank: BankNumber) { + fn set_current_bank(&mut self, bank: BankNumber) { self.current = bank; } - pub(crate) fn get_current_bank(&self) -> BankNumber { + fn get_current_bank(&self) -> BankNumber { self.current } +} - pub(crate) fn write_byte(&mut self, addr: u16, byte: u8) { +impl BusIo for VariableWorkRam { + fn write_byte(&mut self, addr: u16, byte: u8) { self.bank_n[self.current as usize][addr as usize - VARIABLE_WORK_RAM_START_ADDRESS] = byte; } - pub(crate) fn read_byte(&self, addr: u16) -> u8 { + fn read_byte(&self, addr: u16) -> u8 { self.bank_n[self.current as usize][addr as usize - VARIABLE_WORK_RAM_START_ADDRESS] } }