From 68c9557c43f77caf76167404802718dd3ea1a218 Mon Sep 17 00:00:00 2001 From: Rekai Musuka Date: Tue, 19 Jan 2021 01:36:44 -0600 Subject: [PATCH] chore: improve code quality --- src/bus.rs | 15 +++++------ src/cpu.rs | 20 +++++++------- src/lib.rs | 1 + src/main.rs | 2 +- src/ppu.rs | 27 ++++++------------- src/serial.rs | 72 +++++++++++++++++++++++++++++++++++++++++++++++++ src/sound.rs | 56 +++++++++++--------------------------- src/timer.rs | 21 ++++----------- src/work_ram.rs | 34 +++++++---------------- 9 files changed, 129 insertions(+), 119 deletions(-) create mode 100644 src/serial.rs diff --git a/src/bus.rs b/src/bus.rs index 46659f2..af6d4f1 100644 --- a/src/bus.rs +++ b/src/bus.rs @@ -1,9 +1,9 @@ -use crate::instruction::Cycles; - use super::cartridge::Cartridge; use super::high_ram::HighRAM; +use super::instruction::Cycles; use super::interrupt::Interrupt; use super::ppu::PPU; +use super::serial::Serial; use super::sound::Sound; use super::timer::Timer; use super::work_ram::{VariableWorkRAM, WorkRAM}; @@ -19,12 +19,13 @@ pub struct Bus { interrupt: Interrupt, sound: Sound, hram: HighRAM, + serial: Serial, } impl Default for Bus { fn default() -> Self { Self { - boot: Some(include_bytes!("../bin/DMG_ROM.bin").to_owned()), + boot: None, cartridge: None, ppu: Default::default(), wram: Default::default(), @@ -33,18 +34,15 @@ impl Default for Bus { interrupt: Default::default(), sound: Default::default(), hram: Default::default(), + serial: Default::default(), } } } impl Bus { pub fn with_boot() -> Self { - Default::default() - } - - pub fn without_boot() -> Self { Self { - boot: None, + boot: Some(include_bytes!("../bin/DMG_ROM.bin").to_owned()), ..Default::default() } } @@ -108,6 +106,7 @@ impl Bus { 0xFF00..=0xFF7F => { // IO Registers match addr { + // 0xFF01 => 0xFF07 => self.timer.control.into(), 0xFF0F => self.interrupt.flag.into(), 0xFF11 => self.sound.ch1.sound_duty.into(), diff --git a/src/cpu.rs b/src/cpu.rs index 0db9dea..09cbbb7 100644 --- a/src/cpu.rs +++ b/src/cpu.rs @@ -14,12 +14,7 @@ pub struct Cpu { impl Cpu { pub fn new() -> Self { - Default::default() - } - - pub fn new_without_boot() -> Self { Self { - bus: Bus::without_boot(), reg: Registers { a: 0x01, b: 0x00, @@ -36,6 +31,13 @@ impl Cpu { } } + pub fn boot_new() -> Self { + Self { + bus: Bus::with_boot(), + ..Default::default() + } + } + pub fn ime(&self) -> bool { self.ime } @@ -74,10 +76,10 @@ impl Cpu { let instr = self.decode(opcode); let cycles = self.execute(instr); - println!( - "Addr: {:#06X} | Opcode: {:#04X} | Instr: {:X?}", - self.reg.pc, opcode, instr - ); + // println!( + // "Addr: {:#06X} | Opcode: {:#04X} | Instr: {:X?}", + // self.reg.pc, opcode, instr + // ); self.bus.step(cycles); diff --git a/src/lib.rs b/src/lib.rs index 0183bf6..c2c23a9 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -5,6 +5,7 @@ mod high_ram; mod instruction; mod interrupt; mod ppu; +mod serial; mod sound; mod timer; mod work_ram; diff --git a/src/main.rs b/src/main.rs index 1f2d22a..e31cd8a 100644 --- a/src/main.rs +++ b/src/main.rs @@ -19,7 +19,7 @@ fn main() -> Result<()> { let mut input = WinitInputHelper::new(); let window = create_window(&event_loop)?; let mut pixels = create_pixels(&window)?; - let mut game_boy = LR35902::new(); + let mut game_boy = LR35902::boot_new(); game_boy.load_cartridge("bin/cpu_instrs.gb"); event_loop.run(move |event, _, control_flow| { diff --git a/src/ppu.rs b/src/ppu.rs index e7e25fe..0800c5c 100644 --- a/src/ppu.rs +++ b/src/ppu.rs @@ -178,10 +178,10 @@ impl From for u8 { #[derive(Debug, Clone, Copy)] enum GrayShade { - White, - LightGray, - DarkGray, - Black, + White = 0, + LightGray = 1, + DarkGray = 2, + Black = 3, } impl Default for GrayShade { @@ -202,17 +202,6 @@ impl From for GrayShade { } } -impl From for u8 { - fn from(shade: GrayShade) -> Self { - match shade { - GrayShade::White => 0b00, - GrayShade::LightGray => 0b01, - GrayShade::DarkGray => 0b10, - GrayShade::Black => 0b11, - } - } -} - #[derive(Debug, Clone, Copy, Default)] pub struct BackgroundPalette { color3: GrayShade, @@ -234,10 +223,10 @@ impl From for BackgroundPalette { impl From for u8 { fn from(palette: BackgroundPalette) -> Self { - let color0: u8 = palette.color0.into(); - let color1: u8 = palette.color1.into(); - let color2: u8 = palette.color2.into(); - let color3: u8 = palette.color0.into(); + let color0: u8 = palette.color0 as u8; + let color1: u8 = palette.color1 as u8; + let color2: u8 = palette.color2 as u8; + let color3: u8 = palette.color0 as u8; color3 << 6 | color2 << 4 | color1 << 2 | color0 } diff --git a/src/serial.rs b/src/serial.rs new file mode 100644 index 0000000..0e87eb2 --- /dev/null +++ b/src/serial.rs @@ -0,0 +1,72 @@ +#[derive(Debug, Clone, Copy, Default)] +pub struct Serial { + next: u8, + control: SerialControl, +} + +#[derive(Debug, Clone, Copy, Default)] +pub struct SerialControl { + transfer_start: bool, + speed: ClockSpeed, // CGB Only + shift: ShiftClock, +} + +impl From for SerialControl { + fn from(byte: u8) -> Self { + Self { + transfer_start: byte >> 7 == 0x01, + speed: ((byte >> 1) & 0x01).into(), + shift: (byte & 0x01).into(), + } + } +} + +impl From for u8 { + fn from(control: SerialControl) -> Self { + (control.transfer_start as u8) << 7 | (control.speed as u8) << 1 | control.shift as u8 + } +} + +#[derive(Debug, Clone, Copy)] +enum ShiftClock { + External = 0, + Internal = 1, +} + +impl Default for ShiftClock { + fn default() -> Self { + Self::External + } +} + +impl From for ShiftClock { + fn from(byte: u8) -> Self { + match byte { + 0b00 => Self::External, + 0b01 => Self::Internal, + _ => unreachable!("{:#04X} is not a valid value for ShiftClock", byte), + } + } +} + +#[derive(Debug, Clone, Copy)] +enum ClockSpeed { + Normal = 0, + Fast = 1, +} + +impl Default for ClockSpeed { + fn default() -> Self { + Self::Normal + } +} + +impl From for ClockSpeed { + fn from(byte: u8) -> Self { + match byte { + 0b00 => Self::Normal, + 0b01 => Self::Fast, + _ => unreachable!("{:#04X} is not a valid value for ClockSpeed", byte), + } + } +} diff --git a/src/sound.rs b/src/sound.rs index a56edda..1b29138 100644 --- a/src/sound.rs +++ b/src/sound.rs @@ -29,8 +29,8 @@ pub struct Frequency { #[derive(Debug, Clone, Copy)] enum FrequencyType { - Counter, - Consequtive, + Counter = 0, + Consequtive = 1, } impl From for FrequencyType { @@ -43,15 +43,6 @@ impl From for FrequencyType { } } -impl From for u8 { - fn from(freq_type: FrequencyType) -> Self { - match freq_type { - FrequencyType::Counter => 0b00, - FrequencyType::Consequtive => 0b01, - } - } -} - impl Default for FrequencyType { fn default() -> Self { Self::Counter @@ -142,7 +133,7 @@ impl From for VolumeEnvelope { impl From for u8 { fn from(envelope: VolumeEnvelope) -> Self { - let dir_bit: u8 = envelope.direction.into(); + let dir_bit: u8 = envelope.direction as u8; let mut byte = envelope.init_vol << 4; byte |= dir_bit << 3; byte |= envelope.sweep_count; @@ -152,8 +143,8 @@ impl From for u8 { #[derive(Debug, Clone, Copy)] enum EnvelopeDirection { - Decrease, - Increase, + Decrease = 0, + Increase = 1, } impl From for EnvelopeDirection { @@ -161,23 +152,17 @@ impl From for EnvelopeDirection { match byte { 0b00 => Self::Decrease, 0b01 => Self::Increase, - _ => unreachable!("{:#04X} is not a possible value for EnvelopeDirection"), - } - } -} - -impl From for u8 { - fn from(envelope: EnvelopeDirection) -> Self { - match envelope { - EnvelopeDirection::Decrease => 0b00, - EnvelopeDirection::Increase => 0b01, + _ => unreachable!( + "{:#04X} is not a possible value for EnvelopeDirection", + byte + ), } } } impl Default for EnvelopeDirection { fn default() -> Self { - Self::Decrease // Reasoning: Decrease is 0 + Self::Decrease } } @@ -201,7 +186,7 @@ impl From for SoundDuty { impl From for u8 { fn from(duty: SoundDuty) -> Self { - let mut byte: u8 = duty.wave_pattern.into(); + let mut byte: u8 = duty.wave_pattern as u8; byte = (byte << 6) | duty.sound_length; byte } @@ -209,10 +194,10 @@ impl From for u8 { #[derive(Debug, Clone, Copy)] pub enum WaveDuty { - OneEighth, // 12.5% ( _-------_-------_------- ) - OneQuarter, // 25% ( __------__------__------ ) - OneHalf, // 50% ( ____----____----____---- ) (normal) - ThreeQuarters, // 75% ( ______--______--______-- ) + OneEighth = 0, // 12.5% ( _-------_-------_------- ) + OneQuarter = 1, // 25% ( __------__------__------ ) + OneHalf = 2, // 50% ( ____----____----____---- ) (normal) + ThreeQuarters = 3, // 75% ( ______--______--______-- ) } impl Default for WaveDuty { @@ -221,17 +206,6 @@ impl Default for WaveDuty { } } -impl From for u8 { - fn from(wave: WaveDuty) -> Self { - match wave { - WaveDuty::OneEighth => 0b00, - WaveDuty::OneQuarter => 0b01, - WaveDuty::OneHalf => 0b10, - WaveDuty::ThreeQuarters => 0b11, - } - } -} - impl From for WaveDuty { fn from(byte: u8) -> Self { match byte { diff --git a/src/timer.rs b/src/timer.rs index 2d00045..6e493d0 100644 --- a/src/timer.rs +++ b/src/timer.rs @@ -21,10 +21,10 @@ impl Default for Timer { #[derive(Debug, Clone, Copy)] enum TimerSpeed { - Freq4096Hz, - Freq262144Hz, - Freq65536Hz, - Freq16384Hz, + Freq4096Hz = 0, + Freq262144Hz = 1, + Freq65536Hz = 2, + Freq16384Hz = 3, } impl From for TimerSpeed { @@ -39,17 +39,6 @@ impl From for TimerSpeed { } } -impl From for u8 { - fn from(speed: TimerSpeed) -> Self { - match speed { - TimerSpeed::Freq4096Hz => 0x00, - TimerSpeed::Freq262144Hz => 0x01, - TimerSpeed::Freq65536Hz => 0x10, - TimerSpeed::Freq16384Hz => 0x11, - } - } -} - #[derive(Debug, Clone, Copy)] pub struct TimerControl { enabled: bool, @@ -69,7 +58,7 @@ impl From for TimerControl { impl From for u8 { fn from(control: TimerControl) -> Self { - let byte: u8 = control.speed.into(); // Get bit 1 and 0. + let byte: u8 = control.speed as u8; // Get bit 1 and 0. (byte & !(1u8 << 2)) | ((control.enabled as u8) << 2) // specifically manibulate bit 2 } diff --git a/src/work_ram.rs b/src/work_ram.rs index 8584e1f..53c6360 100644 --- a/src/work_ram.rs +++ b/src/work_ram.rs @@ -23,27 +23,13 @@ impl Default for WorkRAM { #[derive(Debug, Clone, Copy)] pub enum BankNumber { - One, - Two, - Three, - Four, - Five, - Six, - Seven, -} - -impl From for usize { - fn from(bank_num: BankNumber) -> Self { - match bank_num { - BankNumber::One => 1, - BankNumber::Two => 2, - BankNumber::Three => 3, - BankNumber::Four => 4, - BankNumber::Five => 5, - BankNumber::Six => 6, - BankNumber::Seven => 7, - } - } + One = 1, + Two = 2, + Three = 3, + Four = 4, + Five = 5, + Six = 6, + Seven = 7, } #[derive(Debug, Clone)] @@ -71,12 +57,10 @@ impl VariableWorkRAM { } pub fn write_byte(&mut self, index: usize, byte: u8) { - let num: usize = self.current.into(); - self.bank_n[num][index] = byte; + self.bank_n[self.current as usize][index] = byte; } pub fn read_byte(&self, index: usize) -> u8 { - let num: usize = self.current.into(); - self.bank_n[num][index] + self.bank_n[self.current as usize][index] } }