From 48e81ff426b6e27c57b49e7f15a2c7aa13547e70 Mon Sep 17 00:00:00 2001
From: Rekai Musuka <rekai@musuka.dev>
Date: Mon, 5 Jul 2021 00:43:02 -0500
Subject: [PATCH] fix(cartridge): fix bug preventing MBC1 from working

---
 src/cartridge.rs | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

diff --git a/src/cartridge.rs b/src/cartridge.rs
index 999ab0a..c446f3f 100644
--- a/src/cartridge.rs
+++ b/src/cartridge.rs
@@ -137,7 +137,7 @@ impl BusIo for Cartridge {
     }
 }
 
-#[derive(Debug, Clone, Default)]
+#[derive(Debug, Clone)]
 struct Mbc1 {
     /// 5-bit number
     rom_bank: u8,
@@ -150,6 +150,20 @@ struct Mbc1 {
     ram_enabled: bool,
 }
 
+impl Default for Mbc1 {
+    fn default() -> Self {
+        Self {
+            rom_bank: 0x01,
+            ram_bank: Default::default(),
+            mode: Default::default(),
+            ram_size: Default::default(),
+            ram: Default::default(),
+            bank_count: Default::default(),
+            ram_enabled: Default::default(),
+        }
+    }
+}
+
 impl Mbc1 {
     fn zero_bank(&self) -> u8 {
         use BankCount::*;
@@ -223,13 +237,13 @@ impl MemoryBankController for Mbc1 {
         match addr {
             0x0000..=0x3FFF => {
                 if self.mode {
-                    Address((0x4000 * self.zero_bank() as usize) + addr as usize)
+                    Address(0x4000 * self.zero_bank() as usize + addr as usize)
                 } else {
                     Address(addr as usize)
                 }
             }
             0x4000..=0x7FFF => {
-                Address((0x4000 * self.high_bank() as usize) + (addr as usize - 0x4000))
+                Address(0x4000 * self.high_bank() as usize + (addr as usize - 0x4000))
             }
             0xA000..=0xBFFF => {
                 if self.ram_enabled {