diff --git a/src/bus.rs b/src/bus.rs
index ff3b784..d0b19c0 100644
--- a/src/bus.rs
+++ b/src/bus.rs
@@ -323,4 +323,8 @@ impl Bus {
         // Update the Timer's instance of the following interrupts
         self.timer.set_interrupt(timer);
     }
+
+    pub fn boot_enabled(&self) -> bool {
+        self.boot.is_some()
+    }
 }
diff --git a/src/cpu.rs b/src/cpu.rs
index b7c0ad6..f65f1e7 100644
--- a/src/cpu.rs
+++ b/src/cpu.rs
@@ -86,7 +86,7 @@ impl Cpu {
     }
 
     pub fn step(&mut self) -> Cycle {
-        if self.reg.pc > 0x100 {
+        if !self.bus.boot_enabled() {
             self.log_state().unwrap();
         }